công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

TLV5616CD bảng dữ liệu(PDF) 3 Page - Texas Instruments

Click here to check the latest version.
tên linh kiện TLV5616CD
Giải thích chi tiết về linh kiện  2.7 V TO 5.5 V LOW POWER 12-BIT DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN
PDF  23 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
Logo TI - Texas Instruments

TLV5616CD bảng dữ liệu(HTML) 3 Page - Texas Instruments

  TLV5616CD Datasheet HTML 1Page - Texas Instruments TLV5616CD Datasheet HTML 2Page - Texas Instruments TLV5616CD Datasheet HTML 3Page - Texas Instruments TLV5616CD Datasheet HTML 4Page - Texas Instruments TLV5616CD Datasheet HTML 5Page - Texas Instruments TLV5616CD Datasheet HTML 6Page - Texas Instruments TLV5616CD Datasheet HTML 7Page - Texas Instruments TLV5616CD Datasheet HTML 8Page - Texas Instruments TLV5616CD Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 23 page
background image
TLV5616C, TLV5616I
2.7 V TO 5.5 V LOW POWER 12-BIT DIGITAL-TO-ANALOG
CONVERTERS WITH POWER DOWN
SLAS152B – DECEMBER 1997 – REVISED MARCH 1999
3
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage (VDD to AGND)
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference input voltage range
– 0.3 V to VDD + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage range
– 0.3 V to VDD + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: TLV5616C
0
°C to 70°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLV5616I
– 40
°C to 85°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage VDD
VDD = 5 V
4.5
5
5.5
V
Supply voltage, VDD
VDD = 3 V
2.7
3
3.3
V
High-level digital input voltage, VIH
VDD = 2.7 V to 5.5 V
2
V
Low-level digital input voltage, VIL
VDD = 2.7 V to 5.5 V
0.8
V
Reference voltage, Vref to REFIN terminal
VDD = 5 V (see Note 1)
AGND
2.048
VDD –1.5
V
Reference voltage, Vref to REFIN terminal
VDD = 3 V (see Note 1)
AGND
1.024
VDD – 1.5
V
Load resistance, RL
2
10
k
Ω
Load capacitance, CL
100
pF
Clock frequency, fCLK
20
MHz
Operating free air temperature TA
TLV5616C
0
70
°C
Operating free-air temperature, TA
TLV5616I
–40
85
°C
NOTE 1: Due to the x2 output buffer, a reference input voltage
≥ VDD/2 causes clipping of the transfer function.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
power supply
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VDD = 5 V, VREF = 2.048 V,
No load,
Fast
0.9
1.35
mA
IDD
Power supply current
All inputs = AGND or VDD,
DAC latch = 0x800
Slow
0.4
0.6
mA
IDD
Power supply current
VDD = 3 V, VREF = 1.024 V
No load,
Fast
0.7
1.1
mA
All inputs = AGND or VDD,
DAC latch = 0x800
Slow
0.3
0.45
mA
Power down supply current (see Figure 12)
10
nA
PSRR
Power supply rejection ratio
Zero scale
See Note 2
–80
dB
PSRR
Power supply rejection ratio
Full scale
See Note 3
–80
dB
Power on threshold voltage, POR
2
V
NOTES:
2. Power supply rejection ratio at zero scale is measured by varying VDD and is given by:
PSRR = 20 log [(EZS(VDDmax) – EZS(VDDmin))/VDDmax]
3. Power supply rejection ratio at full scale is measured by varying VDD and is given by:
PSRR = 20 log [(EG(VDDmax) – EG(VDDmin))/VDDmax]



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com