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TLV4110IP bảng dữ liệu(PDF) 6 Page - Texas Instruments |
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TLV4110IP bảng dữ liệu(HTML) 6 Page - Texas Instruments |
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6 / 21 page ![]() TLV4110, TLV4111, TLV4112, TLV4113 FAMILY OF HIGH OUTPUT DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS289A – DECEMBER 1999 – REVISED APRIL 2000 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics at specified free-air temperature, VDD = 3 V and 5 V (unless otherwise noted) (continued) dynamic performance PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNITS GBWP Gain bandwidth product RL=100 Ω CL=10 pF 25 °C 2.7 MHz VDD =3V 25 °C 0.8 1.57 SR Slew rate at unity gain Vo(pp) = 2 V, RL 100 Ω VDD = 3 V Full range 0.55 V/ µs SR Slew rate at unity gain RL = 100 Ω, CL = 10 pF VDD =5V 25 °C 1 1.57 V/ µs CL = 10 F VDD = 5 V Full range 0.7 φM Phase margin RL = 100 Ω CL =10 pF 25 °C 66 Gain margin RL = 100 Ω, CL = 10 pF 25 °C 16 dB t Settling time V(STEP)pp = 1 V, AV = –1, 0.1% 25 °C 0.7 µs ts Settling time V CL = 10 pF, RL = 100 Ω 0.01% 25 °C 1.3 µs † Full range is 0 °C to 70°C for C suffix and –40°C to 125°C for I suffix. If not specified, full range is –40°C to 125°C. noise/distortion performance PARAMETER TEST CONDITIONS TA MIN TYP MAX UNITS VO(pp) = VDD/2 V, AV = 1 0.025 THD+N Total harmonic distortion plus noise VO( ) = VDD/2 V, RL = 100 Ω, AV = 10 0.035 f = 100 Hz AV = 100 25 °C 0.15 V Equivalent input noise voltage f = 100 Hz 25 °C 55 nV/ √Hz Vn Equivalent input noise voltage f = 10 kHz 10 nV/ √Hz In Equivalent input noise current f = 1 kHz 0.31 fA/ √Hz shutdown characteristics PARAMETER TEST CONDITIONS TA† MIN TYP MAX UNITS IDD(SHDN) Supply current in shutdown mode (per channel) SHDN 0V 25 °C TBD µA IDD(SHDN) y( ) (TLV4110, TLV4113) SHDN = 0 V Full range TBD µA t(ON) Amplifier turnon time‡ RL = 100 Ω 25 °C TBD µs t(Off) Amplifier turnoff time‡ RL = 100 Ω 25 °C TBD µs † Full range is 0 °C to 70°C for C suffix and –40°C to 125°C for I suffix. If not specified, full range is –40°C to 125°C. ‡ Disable time and enable time are defined as the interval between application of the logic signal to SHDN and the point at which the supply current has reached half its final value. |
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