THS7001, THS7002

70-MHz PROGRAMMABLE-GAIN AMPLIFIERS

SLOS214B – OCTOBER 1998 – REVISED AUGUST 1999

21

POST OFFICE BOX 655303

APPLICATION INFORMATION

output clamping

Typically, the output of the PGA will directly drive an analog-to-digital converter (ADC). Because of the limited

linear input range and saturation characteristics of most ADCs, the PGA’s outputs incorporate a voltage clamp.

Unlike a lot of clamping amplifiers which clamp only at the input, the THS7001 and THS7002 clamps at the

output stage. This insures that the output will always be protected regardless of the Gain setting and the input

voltage. The clamps activate almost instantaneously and recover from saturation in less than 7 ns. This can be

extremely important when the THS7001 and THS7002 is used to drive some ADCs which have a very long

overdrive recovery time. It is also recommended to add a pair of high frequency bypass capacitors to the clamp

inputs. These capacitors will help eliminate any ringing which may ocur when a large pulse is applied to the

amplifier. This pulse will force the clamp diodes to abruptly turn on, drawing current from the reference voltages.

Just like a power supply trace, you must minimize the inductance seen by the clamp pins. The bypass capacitors

will supply the sudden current demands when the clamps are suddenly turned on. A simplified clamping circuit

diagram is shown in Figure 57.

+VCC

–VCC

To Bias Circuits

VH

VL

OUT

Output

Transistor

Output

Transistor

Drive

V1

0.1

µF

V2

0.1

µF

Figure 57. Simplified THS7001 and THS7002 Clamp Circuit

Because the internal clamps utilize the same clamping reference voltages, the outputs of both PGAs on the

THS7002 are clamped to the same values. These clamps are typically connected to the power supply pins to

allow a full output range. But, they can be connected to any voltage reference desired. The clamping range is

clamp, but it is not recommended. This is because this operation relies on the internal bias currents in the Class

AB output stage to maintain their linearity. There may also be a chance to reverse bias the PN junctions and

possibly cause internal damage to these junctions. But for reference, the graphs in Figure 58 show the output

voltage versus the clamping voltage with different loads.