THS10064IDA datasheet(6/41 Pages) TI

6 / 41 page

THS10064

10-BIT 6 MSPS, SIMULTANEOUS SAMPLING

ANALOG-TO-DIGITAL CONVERTER

SLAS255 – DECEMBER 1999

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended operating conditions, AVDD = 5 V,

DVDD = BVDD = 3.3 V, fs = 6 MSPS, VREF = internal (unless otherwise noted) (continued)

dc specifications

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Resolution

Bits

Accuracy

Integral nonlinearity, INL

±1

LSB

Differential nonlinearity, DNL

±1

LSB

Offset error

After calibration in single-ended mode

–15

Offset error

After calibration in differential mode

–5

Gain error

FSR

Analog input

Input capacitance

Input leakage current

VAIN = VREFM to VREFP

±10

µA

Internal voltage reference

Accuracy, VREFP

3.33

3.5

3.67

Accuracy, VREFM

1.42

1.5

1.58

Temperature coefficient

PPM/

°C

Reference noise

100

µV

Accuracy, REFOUT

2.475

2.5

2.525

Power supply

IDDA

Analog supply current

AVDD =5 V, BVDD = DVDD = 3.3 V

IDDD

Digital supply voltage

AVDD = 5 V, BVDD = DVDD = 3.3 V

0.5

IDDB

Buffer supply voltage

AVDD = 5 V, BVDD = DVDD = 3.3 V

1.5

IDD_P

Supply current in power-down mode

AVDD = 5 V, BVDD = DVDD = 3.3 V

Power dissipation

AVDD = 5 V, DVDD = BVDD = 3.3 V

186

216

Power dissipation in power down

AVDD = 5 V, DVDD = BVDD = 3.3 V

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