SN74LVC823ADBLE datasheet(2/14 Pages) TI

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DESCRIPTION/ORDERING INFORMATION (CONTINUED)

To Eight Other Channels

CLKEN

CLK

CLR

SN74LVC823A

9-BIT BUS-INTERFACE FLIP-FLOP

WITH 3-STATE OUTPUTS

SCAS305I – MARCH 1993 – REVISED FEBRUARY 2005

A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high or

low logic levels) or the high-impedance state. OE does not affect the internal operations of the latch. Previously

stored data can be retained or new data can be entered while the outputs are in the high-impedance state.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators

in a mixed 3.3-V/5-V system environment.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

FUNCTION TABLE

(EACH FLIP-FLOP)

INPUTS

OUTPUT

CLR

CLKEN

CLK

↑

LOGIC DIAGRAM (POSITIVE LOGIC)

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