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3

2

4

5

1

NC

Y

A

GND

DBV PACKAGE

(TOP VIEW)

YEA, YEP, YZA, OR YZP PACKAGE

(BOTTOM VIEW)

DCK PACKAGE

(TOP VIEW)

3

2

4

5

1

NC

Y

A

GND

3

2

4

5

1

NC

Y

A

GND

DNU

GND

Y

A

DRL PACKAGE

(TOP VIEW)

See mechanical drawings for dimensions.

1

4

2

3

5

DNU − Do not use

YZV PACKAGE

(BOTTOM VIEW)

GND

Y

A

3

1

2

4

DESCRIPTION/ORDERING INFORMATION

SN74LVC1G04

SINGLE INVERTER GATE

SCES214S – APRIL 1999 – REVISED OCTOBER 2005

•

Available in the Texas Instruments

•

NanoStar™ and NanoFree™ Packages

Operation

•

Supports 5-V V

•

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

•

Inputs Accept Voltages to 5.5 V

•

ESD Protection Exceeds JESD 22

•

Max t

– 2000-V Human-Body Model (A114-A)

•

Low Power Consumption, 10-

µA Max I

CC

– 200-V Machine Model (A115-A)

•

±24-mA Output Drive at 3.3 V

– 1000-V Charged-Device Model (C101)

The SN74LVC1G04 performs the Boolean function Y = A.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

preventing damaging current backflow through the device when it is powered down.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 1999–2005, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.