Key Features

x

Ultra-Fast response for Fast-20 SCSI applications

x

Hot swap compatible

x

35MHz channel bandwidth

x

3.5V operation

x

Less than 3pF output capacitance

x

Sleep-mode current less than 375µA

x

Thermally self limiting

x

No external compensation capacitors

x

Implements 8-bit or 16-bit (wide) applications

x

Compatible with active negation drivers

(60ma/channel)

x

Compatible with passive and active terminations

x

Approved for use with SCSI 1, 2, 3 and UltraSCSI

Block Diagrams

–

+

Current

Biasing

Circuit

Thermal

Limiting

Circuit

24mA Current

Limiting Circuit

Term Power

DATA OUTPUT

PIN DB (0)

1 of 9 Channels

Disable Pin

1.4V

2.85V

5219_01.eps

9-Line SCSI T

or

The 9-channel IMP5219 SCSI terminator is part of IMP's family of high-

performance SCSI terminators that deliver true UltraSCSI performance.

The BiCMOS design offers superior performance over first generation

linear regulator/resistor based terminators.

IMP's new architecture employs high-speed adaptive elements for each

channel, thereby providing the fastest response possible - typically

35MHz, which is 100 times faster than the older linear regulator termi-

nator approach. The bandwidth of terminators based on the older

regulator/resistor terminator architecture is limited to 500kHz since a

large output stabilization capacitor is required. The IMP architecture

eliminates the external output compensation capacitor and the need

for transient output capacitors while maintaining pin compatibility

with first generation designs. Reduced component count is inherent

with the IMP5219.

The IMP5219 architecture tolerates marginal system designs. A key

improvement offered by the IMP5219 lies in its ability to insure reliable,

error-free communications even in systems which do not adhere to rec-

ommended SCSI hardware design guidelines, such as improper cable

lengths and impedance. Frequently, this situation is not controlled by the

peripheral or host designer.

For portable and configurable peripherals, the IMP5219 can be placed in

a sleep mode with an active LOW disable signal. Quiescent current is

typically 375

µA and output are in a high impedance state when disabled.

IMP5

IMP52

© 2000 IMP, Inc.

Data Communications

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