SN65175, SN75175

QUADRUPLE DIFFERENTIAL LINE RECEIVERS

SLLS145B – OCTOBER 1990 – REVISED MAY 1995

2

POST OFFICE BOX 655303

4Y

3Y

2Y

1Y

4B

4A

3B

3A

3, 4EN

2B

2A

1B

1A

1, 2EN

13

11

5

3

15

14

9

10

12

7

6

1

2

4

EN

EN

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

logic diagram (positive logic)

2B

2A

1B

1A

1, 2EN

2Y

1Y

3

5

4B

4A

3B

3A

3, 4EN

13

11

3Y

4Y

15

14

9

10

12

7

6

1

2

4

schematics of inputs and outputs

TYPICAL OF ALL OUTPUTS

EQUIVALENT OF EACH ENABLE INPUT

EQUIVALENT OF EACH A OR B INPUT

Output

VCC

Input

VCC

VCC

Input

16.8 k

Ω

NOM

960

Ω

NOM

8.3 k

Ω

NOM

85

Ω

NOM

960

Ω

NOM