SN54LVC652A, SN74LVC652A

OCTAL BUS TRANSCEIVERS AND REGISTERS

WITH 3-STATE OUTPUTS

SCAS303H – JANUARY 1993 – REVISED AUGUST 1998

1

POST OFFICE BOX 655303

CMOS) Submicron Process

All Ports (5-V Input/Output Voltage With

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Small-Outline (DW), Shrink Small-Outline

(DB), Thin Shrink Small-Outline (PW)

Packages, and Ceramic Chip Carriers (FK)

description

The SN54LVC652A octal bus transceiver and

operation, and the SN74LVC652A octal bus

transceiver and register is designed for 1.65-V to

These devices consist of bus transceiver circuits,

D-type flip-flops, and control circuitry arranged for

multiplexed transmission of data directly from the

data bus or from the internal storage registers.

Output-enable (OEAB and OEBA) inputs are

provided to control the transceiver functions.

Select-control (SAB and SBA) inputs are provided

to select whether real-time or stored data is

transferred. The circuitry used for select control

eliminates the typical decoding glitch that occurs

in a multiplexer during the transition between stored and real-time data. A low input selects real-time data, and

a high input selects stored data. Figure 1 illustrates the four fundamental bus-management functions that are

performed with the ’LVC652A.

Data on the A or B data bus, or both, is stored in the internal D-type flip-flops by low-to-high transitions at the

appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control pins. When SAB and

SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by

simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other

data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators

in a mixed 3.3-V/5-V system environment.

Copyright

© 1998, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

SN74LVC652A . . . DB, DW, OR PW PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

CLKAB

SAB

OEAB

A1

A2

A3

A4

A5

A6

A7

A8

GND

CLKBA

SBA

OEBA

B1

B2

B3

B4

B5

B6

B7

B8

SN54LVC652A . . . FK PACKAGE

(TOP VIEW)

32 1 28 27

12 13

5

6

7

8

9

10

11

25

24

23

22

21

20

19

OEBA

B1

B2

NC

B3

B4

B5

A1

A2

A2

NC

A4

A5

A6

426

14 15 16 17 18

NC – No internal connection

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.