CDK1302 datasheet(4/9 Pages) CADEKA

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Data Sheet

Electrical Characteristics

(TJ = TC = TA = +25°C , VEE = -5.2V, VRB = -2.0V, VRM = -1.0V, VRT = 0.00V, ƒCLK = 750MHz, Duty Cycle=50%,

unless otherwise specified)

cDK1302a

cDl1302B

symbol

parameter

conditions

Min

typ

Max

Min

typ

Max

units

Resolution

bits

DC Performance

DLE

Differential Linearity Error(1)

ƒclk = 100MHz

-1.0

+1.0

-1.5

+1.5

LSB

ILE

Integral Linearity Error(1)

ƒclk = 100MHz

-0.85

+0.95

-0.95

+1.5

LSB

No Missing Codes

Guaranteed

Analog Input

Input Voltage Range(1)

VRB

VRT

VRB

VRT

Input Bias Current(1)

VIN = 0V

0.75

2.0

0.75

2.0

Input Resistance

kΩ

Input Capacitance

Over Full Input Range

Input Bandwidth

Small Signal

900

MHz

Large Signal

500

MHz

Offset Error(2)

VRT

-30

+30

-30

+30

Offset Error(2)

VRB

-30

+30

-30

+30

Input Slew Rate

V/ns

Clock Synchronous Input Currents

μA

Reference Input

Ladder Resistance(1)

Reference Bandwidth

MHz

Timing Characteristics

Maximum Sample Rate(1)

750

MHz

Aperture Jitter

Acquisition Time

250

CLK to Data Delay(2)

0.9

1.4

1.9

0.9

1.4

1.9

CLK to Data Ready Delay(2)

1.25

1.75

2.25

1.25

1.75

2.25

Dynamic Performance

SNR

Signal-to-Noise Ratio

ƒIN = 50MHz(1)

ƒIN = 250MHz(1)

THD

Total Harmonic Distortion

ƒIN = 50MHz(1)

-45

-43

dBc

ƒIN = 250MHz(1)

-37

-35

dBc

SFDR

Spurious Free Dynamic Range

ƒIN = 50MHz(1)

ƒIN = 250MHz(1)

SINAD

Signal-to-Noise and Distortion

ƒIN = 50MHz(1)

ƒIN = 250MHz(1)

notes:

1. 100% production tested at +25°C.

2. Parameter is guaranteed (but not tested) by design and characterization data.

3. Typical Thermal Impedance:

θJC = +4°C/W.

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