SN54ALVTH16601, SN74ALVTH16601

2.5-V/3.3-V 18-BIT UNIVERSAL BUS TRANSCEIVER

WITH 3-STATE OUTPUTS

SCES143A – SEPTEMBER 1998 – REVISED JULY 1999

2

POST OFFICE BOX 655303

description (continued)

Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),

and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB and

CLKENBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When

LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored

in the latch/flip-flop on the low-to-high transition of CLKAB. Output enable OEAB is active low. When OEAB is

low, the outputs are active. When OEAB is high, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, CLKBA, and CLKENBA.

disables the outputs, preventing damaging current backflow through the device when it is powered down. The

power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,

which prevents driver conflict.

the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN54ALVTH16601 is characterized for operation over the full military temperature range of –55

°C to

125

°C. The SN74ALVTH16601 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE†

INPUTS

OUTPUT

CLKENAB

OEAB

LEAB

CLKAB

A

B

X

H

X

X

X

Z

X

LH

X

L

L

X

LH

X

H

H

H

LL

X

X

B0‡

H

LL

X

X

B0‡

L

LL

↑

LL

L

LL

↑

HH

L

L

L

L or H

X

B0‡

† A-to-B data flow is shown: B-to-A flow is similar but uses OEBA,

LEBA, CLKBA, and CLKENBA.

‡ Output level before the indicated steady-state input conditions were

established