EP2S15 datasheet(32/238 Pages) ALTERA

32 / 238 page

2–24

Altera Corporation

Stratix II Device Handbook, Volume 1

May 2007

MultiTrack Interconnect

R24 row interconnects span 24 LABs and provide the fastest resource for

long row connections between LABs, TriMatrix memory, DSP blocks, and

Row IOEs. The R24 row interconnects can cross M-RAM blocks. R24 row

interconnects drive to other row or column interconnects at every fourth

LAB and do not drive directly to LAB local interconnects. R24 row

interconnects drive LAB local interconnects via R4 and C4 interconnects.

R24 interconnects can drive R24, R4, C16, and C4 interconnects.

The column interconnect operates similarly to the row interconnect and

vertically routes signals to and from LABs, TriMatrix memory, DSP

blocks, and IOEs. Each column of LABs is served by a dedicated column

interconnect. These column resources include:

■

Shared arithmetic chain interconnects in an LAB

■

Carry chain interconnects in an LAB and from LAB to LAB

■

C4 interconnects traversing a distance of four blocks in up and down

direction

■

C16 column interconnects for high-speed vertical routing through

the device

Stratix II devices include an enhanced interconnect structure in LABs for

routing shared arithmetic chains and carry chains for efficient arithmetic

functions. The register chain connection allows the register output of one

ALM to connect directly to the register input of the next ALM in the LAB

for fast shift registers. These ALM to ALM connections bypass the local

interconnect. The Quartus II Compiler automatically takes advantage of

these resources to improve utilization and performance. Figure 2–17

shows the shared arithmetic chain, carry chain and register chain

interconnects.

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