EPC4 datasheet(19/36 Pages) ALTERA

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Configuration Devices for SRAM-Based LUT Devices Data Sheet

Table 6 defines the APEX 20K, FLEX 10K, and FLEX 6000 timing

parameters when using EPC2, EPC1, and EPC1441 devices at 5.0 V.

Notes to

Table 6:

(1)

Do not use EPC16, EPC8, EPC4, or EPC2 devices to configure FLEX 6000 devices.

(2)

For more information regarding EPC4, EPC8, or EPC16 configuration device timing

parameters, see the Enhanced Configuration Device (EPC4, EPC8 & EPC16) Data Sheet.

(3)

The configuration device imposes a POR delay upon initial power-up to allow the

voltage supply to stabilize. Subsequent reconfigurations do not incur this delay.

FLEX 8000 Device Configuration

FLEX 8000 devices differ from ACEX 1K, APEX 20K, APEX II, FLEX 10K,

and FLEX 6000 devices in that they have internal oscillators that can

provide a DCLK signal to the configuration device. The configuration

device sends configuration data out as a serial bitstream on the DATA

output pin. This data is routed into the FLEX 8000 device via the DATA0

input pin. The EPC1, EPC1441, EPC1213, EPC1064, and EPC1064V

configuration devices support this type of configuration.

Table 6. APEX 20K, FLEX 10K & FLEX 6000 Timing Parameters using EPC2,

EPC1 & EPC1441 Devices at 5.0 V

Notes (1), (2)

Symbol

Parameter

Min

Max

Units

tPOR

POR delay (3)

200

tOEZX

high to DATA output enabled

tCH

DCLK

high time

tCL

DCLK

low time

tDSU

Data setup time before rising edge on

DCLK

tDH

Data hold time after rising edge on DCLK

0ns

tCO

DCLK

to DATA out

tOEW

low pulse width to guarantee counter

reset

100

fCLK

DCLK

frequency

6.7

16.7

MHz

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