CD54HC4514 datasheet(5/14 Pages) TI

5 / 14 page

E to Outputs

tPHL, tPLH

CL = 50pF

175

220

265

4.5

CL = 15pF

CL = 50pF

Output Transition Time

tTHL, tTLH

CL = 50pF

110

4.5

Input Capacitance

CIN

CL = 50pF

Power Dissipation Capacitance

(Notes 3, 4)

CPD

-5

NOTES:

3. CPD is used to determine the dynamic power consumption, per package.

4. PD = VCC

2 f

i (CPD + CL) where fi = Input Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.

Switching Speciﬁcations CL = 50pF, Input tr, tf = 6ns (Continued)

PARAMETER

SYMBOL

TEST

CONDITIONS

VCC (V)

25oC

-40oC TO

85oC

-55oC TO

125oC

UNITS

MIN

TYP

MAX

MIN

MAX

MIN

MAX

Test Circuits and Waveforms

NOTE: Outputs should be switching from 10% VCC to 90% VCC in

accordance with device truth table. For fMAX, input duty cycle = 50%.

FIGURE 1. HC CLOCK PULSE RISE AND FALL TIMES AND

PULSE WIDTH

FIGURE 2. HC TRANSITION TIMES AND PROPAGATION

DELAY TIMES, COMBINATION LOGIC

FIGURE 3. HC TRANSITION TIMES AND PROPAGATION DELAY TIMES, COMBINATION LOGIC

CLOCK

90%

50%

10%

GND

VCC

trCL

tfCL

50%

tWL

tWH

10%

tWL + tWH =

fCL

tPHL

tPLH

tTHL

tTLH

90%

50%

10%

50%

10%

INVERTING

OUTPUT

INPUT

GND

VCC

tr = 6ns

tf = 6ns

90%

tPHL

tPLH

tTHL

tTLH

90%

50%

10%

50%

10%

INVERTING

OUTPUT

INPUT

GND

VCC

tr = 6ns

tf = 6ns

90%

CD54HC4514, CD74HC4514, CD74HC4515

CD54HC4514 bảng dữ liệu(PDF) 5 Page - Texas Instruments

CD54HC4514 bảng dữ liệu(HTML) 5 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14

bảng dữ liệu tải về

Link URL