428L4D10-7 datasheet(2/18 Pages) FREQUENCYDEVICES

2 / 18 page

4-Bit Programmable Filters

428 Series

Digital Tuning &

Control Characteristics

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W eb Address: http://www.freqdev.com

Digital Tuning Characteristics

The digital tuning interface circuits are a parallel set of CMOS

switches which accept CMOS compatible inputs for the four

tuning bits (D0 - D3).

Binary Tuning Range

Pin-Out Key

Analog Input Signal

Tuning Bit 3 (MSB)

OUT Analog Output Signal

Tuning Bit 2

GND Power and Signal Return D1

Tuning Bit 1

+Vs Supply Voltage, Positive D0

Tuning Bit 0 (LSB)

-Vs Supply Voltage, Negative +5V Logic Power

Offset Adjustment

Data Input Specifications

Input Data Levels

(+5Vdc CMOS Logic)

Input Voltage (Vs=15 Vdc)

Low Level In

0 Vdc min.

0.5 Vdc max.

High Level In

3.5 Vdc min.

5.0 Vdc max.

Input Current

High Level In

-0.4mAtyp.

-2.0mAmax.

Low Level In

+0.4mAtyp.

+2.0mAmax.

Input Capacitance

20 pF typ.

30 pF max.

Input Data Format

Frequency Select Bits

Positive Logic

Logic “1” = (+5Vdc)

Logic “0” = Gnd

Bit Weight

(Binary-Coded)

LSB (least significant bit)

MSB (most significant bit)

Frequency Range16:1 Binary Weighted

MSB

---

LSB

Bit

Weight

fc - corner

frequency

fmax/16

fmax/8

fmax/4

fmax/2

fmax

Binary Tuning Equation:

fc = (fmax /16) [1+ D3 x 23 + D2 x 22 + D1 x 21 + D0 x 20]

where D1 - D3 = “0” or “1”, and

fmax = Maximum tuning frequency

fc = Corner frequency;

Minimum tunable frequency = fmax /16 (D0 thru D3 = 0);

Minimum frequency step (Resolution) = fmax /16

Discrete Frequencies

FD0

Discrete Tuning Equation:

fc = FB + D0[f0] + D1[f1] + D2[f2] + D3[f3]

f0, f1, f2, f3 are the incremental frequency shifts for the data

bits D0, D1, D2 and D3. They are selected to realize the five

customer specified programming frequencies F

F4 . Other

programming codes produce valid fc’s between FB and F4 .

Bottom View

0.80"

0.70"

0.10"

0.00"

-Vs

OUT

+5V

GND

+Vs

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