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TTLOS-20 bảng dữ liệu(PDF) 1 Page - Rhombus Industries Inc. |
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TTLOS-20 bảng dữ liệu(HTML) 1 Page - Rhombus Industries Inc. |
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1 / 1 page ![]() For other values & Custom Designs, contact factory. Specifications subject to change without notice. 15801 Chemical Lane, Huntington Beach, CA 92649-1595 Tel: (714) 898-0960 • Fax: (714) 896-0971 TTL_PW 1/98 Rhombus Industries Inc. 23 Dimensions in Inches (mm) 14-Pin Package with Unused Leads Removed Per Schematic GENERAL: For Operating Specifications and Test Condi- tions, see Tables I and VI on page 5 of this catalog. Delays specified for the Leading Edge. Operating Temp. Range ................................. 0OC to +70OC Temperature Coefficient ........................ 500ppm/OC typical Supply Current, I CC TTLPWG .............................. 35 mA typ., 55 mA max. TTLPD .................................. 42 mA typ., 60 mA max. TTLOS .................................. 15 mA typ., 30 mA max. TTL Pulse Width Generator Modules Triggered by the input's rising edge (input pulse width 10 ns, min.), a pulse of specified width will be generated at the output with a propagation delay of 5 ± 2 ns (7 ± 2 ns, for inverted output). High-to-low transitions will not trigger the unit. Designed for output duty- cycle less than 50%. TTL Pulse Width Discriminators Input pulse widths greater than the Nominal value (XX in ns from P/N TTLPD-XX) of the module, will propagate with delay of (XX + 5ns) ± 5% or 2 ns, whichever is greater. Output pulse width will follow the input width ± 7% or 4 ns, whichever is greater. Input pulse widths less than the Nominal value will be sup- pressed. TTLPWG Schematic TTLPD Schematic TTL Gated Oscillators These gated oscillators permit synchroniza- tion of the output square wave with the high-to- low transition of the enable input. When the enable is high, the output is held high. The output will start with a high-to-low transition one half-cycle after the input trigger. The output frequency tolerance is ± 3%. TTLOS Schematic TTL Buffered Pulse Width Generator Modules Part Number Output Pulse Width (ns) Maximum Freq. (MHz) TTLPWG-5 5 ± 1.0 63 TTLPWG-7 7 ± 1.0 53 TTLPWG-10 10 ± 1.5 42 TTLPWG-15 15 ± 2.0 32 TTLPWG-20 20 ± 2.0 22 TTLPWG-25 25 ± 2.0 19 TTLPWG-30 30 ± 2.0 15 TTLPWG-35 35 ± 2.0 13 TTLPWG-40 40 ± 2.0 11 TTLPWG-45 45 ± 2.25 10 TTLPWG-50 50 ± 2.5 9 TTLPWG-60 60 ± 3.0 8 TTLPWG-80 80 ± 4.0 6 TTLPWG-100 100 ± 5.0 5 TTL Pulse Width Discriminator Modules Part Number Suppressed Pulse Width, Max. (ns) Passed Pulse Width, Min. (ns) TTLPD-10 < 8.5 > 11.5 TTLPD-15 < 13.5 > 16.5 TTLPD-20 < 18.5 > 21.5 TTLPD-25 < 23.5 > 26.5 TTLPD-30 < 28.5 > 31.5 TTLPD-40 < 38.0 > 42.0 TTLPD-50 < 47.5 > 52.5 TTLPD-60 < 57.0 > 63.0 TTLPD-75 < 71.0 > 79.0 TTLPD-100 < 95.0 > 105.0 TTLPD-120 < 114.0 > 126.0 TTLPD-125 < 118.7 > 131.3 TTLPD-150 < 142.5 > 157.5 TTLPD-200 < 190.0 > 210.0 TTL Gated Oscillators Part Number Output Frequency TTLOS-5 5 MHz TTLOS-10 10 MHz TTLOS-15 15 MHz TTLOS-20 20 MHz TTLOS-25 25 MHz TTLOS-30 30 MHz TTLOS-33 33 MHz TTLOS-35 35 MHz TTLOS-40 40 MHz TTLOS-45 45 MHz TTLOS-50 50 MHz TTLOS-66 66 MHz TTLOS-75 75 MHz TTLOS-80 80 MHz Electrical Specifications at 25OC Electrical Specifications at 25OC Electrical Specifications at 25OC 1 IN 7 GND OUT 8 Vcc 14 Pulse Width Discriminator 1 IN 7 GND OUT 8 Vcc 14 13 OUT Pulse Width Control Circuit 1 ENABLE 7 GND OUT 8 Vcc 14 SQUARE WAVE OSCILLATOR T T ON OFF OUT Pin 1 E Pin 8 OUT Pin 1 IN Pin 8 PW IN > XX < XX PW IN T D PW OUT OUT Pin 1 IN Pin 8 T D T D PW OUT PW OUT MAX. .245 (6.22) TYP. .810 (20.57) .275 (6.99) MAX. .100 (2.54) TYP. .050 (1.27) TYP. .120 (3.05) MIN. .300 (7.62) .400 (10.16) MAX. .010 (0.25) TYP. .020 (0.51) TYP. .600 (15.24) TYP. |
Số phần tương tự - TTLOS-20 |
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Mô tả tương tự - TTLOS-20 |
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