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FAMDM-13 bảng dữ liệu(PDF) 1 Page - Rhombus Industries Inc.

tên linh kiện FAMDM-13
Giải thích chi tiết về linh kiện  FAMDM Series FAST / TTL Buffered 5-Tap Delay Modules
PDF  1 Pages
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nhà sản xuất  RHOMBUS-IND [Rhombus Industries Inc.]
Trang chủ  http://www.rhombus-ind.com
Logo RHOMBUS-IND - Rhombus Industries Inc.

FAMDM-13 bảng dữ liệu(HTML) 1 Page - Rhombus Industries Inc.

  FAMDM-13 Datasheet HTML 1Page - Rhombus Industries Inc.  
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15801 Chemical Lane, Huntington Beach, CA 92649-1595
Phone: (714) 898-0960 • FAX: (714) 896-0971
www.rhombus-ind.com • email: sales@rhombus-ind.com
Rhombus
Industries Inc.
For other values & Custom Designs, contact factory.
Specifications subject to change without notice.
FAMDM 9901
Vcc
8
1
IN
3
5
6
7
GND
4
2
Tap4
Tap5
Tap1 Tap3
Tap2
.505
(12.83)
MAX.
.120
MIN.
(3.05)
MAX.
.250
(6.35)
.100
(2.54)
TYP.
.050
(1.27)
TYP.
.020
(0.51)
TYP.
.020
(0.51)
TYP.
.300
(7.62)
.285
(7.24)
MAX.
.010
(0.25)
TYP.
.365
(9.27)
MAX.
.250
(6.35)
MAX.
.015
(0.38)
TYP.
.400 (10.16)
.430 (10.92)
.030
(0.76)
TYP.
.008 R
(0.20)
.100
(2.54)
TYP.
.050
(1.27)
TYP.
.020
(0.51)
TYP.
.010
(0.25)
TYP.
.505
(12.83)
MAX.
.285
(7.24)
MAX.
MAX.
.265
(6.73)
.030
(0.76)
TYP.
.330 (8.38)
MAX.
.020 R
(0.51)
.285 (7.24)
.260 (6.60)
.100
(2.54)
TYP.
.050
(1.27)
TYP.
.020
(0.51)
TYP.
.505
(12.83)
MAX.
.285
(7.24)
MAX.
FAST 5 Tap
8-Pin DIP P/N
Tap Delay Tolerances +/- 5% or 2ns (+/- 1ns <13ns)
Tap-to-Tap
(ns)
Tap 1
Tap 2
Tap 3
Tap 4
Total - Tap 5
FAMDM-7
3.0
4.0
5.0
6.0
7 ± 1.0
∗∗ 1 ± 0.5
FAMDM-9
3.0
4.5
6.0
7.5
9 ± 1.0
∗∗ 1.5 ± 0.5
FAMDM-11
3.0
5.0
7.0
9.0
11 ± 1.0
∗∗ 2 ± 0.7
FAMDM-13
3.0
5.5
8.0
10.5
13 ± 1.5
∗∗ 2.5 ± 1.0
FAMDM-15
3.0
6.0
9.0
12.0
15 ± 1.5
3 ± 1.0
FAMDM-20
4.0
8.0
12.0
16.0
20 ± 2.0
4 ± 1.5
FAMDM-25
5.0
10.0
15.0
20.0
25 ± 2.0
5 ± 2.0
FAMDM-30
6.0
12.0
18.0
24.0
30 ± 2.0
6 ± 2.0
FAMDM-35
7.0
14.0
21.0
28.0
35 ± 2.0
7 ± 2.0
FAMDM-40
8.0
16.0
24.0
32.0
40 ± 2.0
8 ± 2.0
FAMDM-50
10.0
20.0
30.0
40.0
50 ± 2.5
10 ± 2.0
FAMDM-60
12.0
24.0
36.0
48.0
60 ± 3.0
12 ± 2.0
FAMDM-75
15.0
30.0
45.0
60.0
75 ± 3.75
15 ± 2.5
FAMDM-100
20.0
40.0
60.0
80.0
100 ± 5.0
20 ± 3.0
FAMDM-125
25.0
50.0
75.0
100.0
125 ± 6.25
25 ± 3.0
FAMDM-150
30.0
60.0
90.0
120.0
150 ± 7.5
30 ± 3.0
FAMDM-200
40.0
80.0
120.0
160.0
200 ± 10.0
40 ± 4.0
FAMDM-250
50.0
100.0
150.0
200.0
250 ± 12.5
50 ± 5.0
FAMDM-350
70.0
140.0
210.0
280.0
350 ± 17.5
70 ± 5.0
FAMDM-500
100.0
200.0
300.0
400.0
500 ± 25.0
100 ± 10.0
FAMDM 8-Pin Schematic
DImensions in Inches (mm)
Electrical Specifications at 25OC
G-SMD
G-SMD
J-SMD
J-SMD
DIP
DIP
** These part numbers do not have 5 equal taps. Tap-to-Tap Delays reference Tap 1.
FAMDM Series FAST / TTL Buffered 5-Tap Delay Modules
P/N Description
FAMDM - XXX X
Buffered 5 Tap Delay
Molded Package Series:
8-pin DIP: FAMDM
Total Delay in nanoseconds (ns)
Lead Style: Blank = Thru-hole
G = “Gull Wing” SMD
J = “J” Bend SMD
Examples: FAMDM-25G = 25ns (5ns per tap)
74F, 8-Pin G-SMD
FAMDM-100 = 100ns (20ns per tap)
74F, 8-Pin DIP
OPERATING SPECIFICATIONS
V
CC Supply Voltage ...................................
5.00 ± 0.25 VDC
I
CC
Supply Current .................................... 48 mA Maximum
Logic “1” Input: V
IH .......................
2.00 V min., 5.50 V max.
I
IH ............................... 20 µA max. @ 2.70V
Logic “0” Input: V
IL ..........................................
0.80 V max.
I
IL ............................................
-0.6 mA mA
V
OH
Logic “1” Voltage Out .................................. 2.40 V min.
V
OL
Logic “0” Voltage Out ............................... 0.50 V max.
P
WI
Input Pulse Width ............................. 40% of Delay min.
Operating Temperature Range ............................ 0O to 70OC
Storage Temperature Range ...................... -65O to +150OC
TEST CONDITIONS -- FAST / TTL
V
CC Supply Voltage ................................................
5.00VDC
Input Pulse Voltage ................................................... 3.20V
Input Pulse Rise Time ....................................... 3.0 ns max.
Input Pulse Width / Period ........................... 1000 / 2000 ns
1. Measurements made at 25OC
2. Delay Times measured at 1.50V level of leading edge.
3. Rise Times measured from 0.75V to 2.40V.
4. 10pf probe and fixture load on output under test.
Low Profile 8-Pin Package
Two Surface Mount Versions
FAST/TTL Logic Buffered
5 Equal Delay Taps
Operating Temperature
Range 0OC to +70OC
14-Pin Versions: FAIDM Series
SIP Versions: FSIDM Series
Low Voltage CMOS Versions
refer to LVMDM / LVIDM Series


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