LTC4098-1 datasheet(24/32 Pages) LINER

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LTC4098/LTC4098-1

40981fb

exceeds 6V plus VF(SCHOTTKY), OVGATE will be pulled to

GND and both the WALL and USB inputs will be protected.

Each input is protected up to the drain-source breakdown,

BVDSS, of MN1 and MN2. R1 must also be rated for the

power dissipated during maximum overvoltage. See the

Operations section for an explanation of this calculation.

Table 4 shows some N-channel MOSFETs that may be

suitable for overvoltage protection.

Alternate NTC Thermistors and Biasing

The LTC4098/LTC4098-1 provide temperature-qualiﬁed

charging if a grounded thermistor and a bias resistor are

connected to NTC and NTCBIAS. By using a bias resistor

whose value is equal to the room temperature resistance

of the thermistor (R25) the upper and lower temperatures

are preprogrammed to approximately 40°C and 0°C, re-

spectively (assuming a Vishay curve 1 thermistor).

The upper and lower temperature thresholds can be ad-

justed by either a modiﬁcation of the bias resistor value

or by adding a second adjustment resistor to the circuit.

If only the bias resistor is adjusted, then either the upper

or the lower threshold can be modiﬁed but not both. The

other trip point will be determined by the characteristics

of the thermistor. Using the bias resistor in addition to an

USB/WALL

ADAPTER

40981 F08

MN1

MP1

VBUS POSITIVE PROTECTION UP TO BVDSS OF MN1

VBUS NEGATIVE PROTECTION UP TO BVDSS OF MP1

VBUS

OVSENS

OVGATE

LTC4098/

LTC4098-1

Figure 8. Dual-Polarity Voltage Protection

Table 4. Recommended OVP FETs

N-CHANNEL

MOSFET

BVDSS

RON

PACKAGE

Si2302ADS

20V

70m

SOT-23

IRLML2502

20V

35m

SOT-23

Si1472DH

30V

65m

SC70-6

NTLJS4114N

30V

20m

2mm

× 2mm DFN

FDN372S

30V

45m

SOT-23

Reverse Voltage Protection

The LTC4098/LTC4098-1 can also be easily protected

against the application of reverse voltage, as shown in

Figure 8. D1 and R1 are necessary to limit the maximum

VGS seen by MP1 during positive overvoltage events.

D1’s breakdown voltage must be safely below MP1’s

BVGS. The circuit shown in Figure 8 offers forward volt-

age protection up to MN1’s BVDSS and reverse voltage

protection up to MP1’s BVDSS.

APPLICATIONS INFORMATION

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