LTC4067 datasheet(14/20 Pages) LINER

14 / 20 page

LTC4067

4067f

OPERATIO

if the battery is below the recharge threshold. There is

approximately 3°C of temperature hysteresis associated

with each of the input comparators. If the NTC pin is tied

to GND, thermistor qualiﬁed charging is disabled.

Fault Conditions

The ⎯C⎯H⎯R⎯G pin provides information as to the charging

status, indicating an active charge cycle with a strong

open-drain pull down at the ⎯C⎯H⎯R⎯G pin. NTC faults and

bad battery faults are indicated with serrated pulses; this

is described in more detail under the heading Fault Condi-

tions in the Applications Information section.

When the battery is being charged, the ⎯C⎯H⎯R⎯G pin is pulled

low by an internal N-channel MOSFET. When the charge

cycle enters voltage mode charging and the charge current

is reduced below ICC-CHG/10, the ⎯C⎯H⎯R⎯G indicates that the

charge cycle is nearly complete by switching to a Hi-Z

state. Also when the battery voltage exceeds the OUT

voltage and the input supply is removed, or the LTC4067

is put into suspend or shutdown modes, the ⎯C⎯H⎯R⎯G pin

is forced into a high impedance state. If a bad battery

is detected, or if an NTC temperature fault is detected,

charging is halted and the ⎯C⎯H⎯R⎯G pin switches to a series

of serrated open-drain pull down pulses. These serrated

current pulses are designed to cause an LED connected

from the ⎯C⎯H⎯R⎯G pin to a positive supply voltage to visibly

ﬂash, indicating to the user that there is a problem, as well

as allowing a microcontroller to detect a fault condition

within 300μs.

Overvoltage Protection

The OVI input is provided to sense potentially hazardous

voltages at the input in case an unregulated wall adapter

is applied. If an overvoltage condition is detected the OVP

pin is driven high to turn off an external PMOS transistor

inserted in series with the IN pin to disconnect the high

voltage from the LTC4067.

Table 2 lists recommended P-channel MOSFETs to use

with the LTC4067.

Table 2. Recommended OVP Transistors

PART NUMBER

DESCRIPTION

IRLML6402

P-channel 16V

FDR8508P

Dual P-channel 16V

If the OVP pin is high, the power path from IN to OUT is

disabled.

LTC4067 bảng dữ liệu(PDF) 14 Page - Linear Technology

LTC4067 bảng dữ liệu(HTML) 14 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

bảng dữ liệu tải về

Link URL