74ACT11074

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

WITH CLEAR AND PRESET

SCAS498A – DECEMBER 1986 – REVISED APRIL 1996

4

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

50% VCC

1.5 V

1.5 V

1.5 V

3 V

3 V

0 V

0 V

th

tsu

VOLTAGE WAVEFORMS

Data Input

tPLH

tPHL

tPHL

tPLH

VOH

VOH

VOL

VOL

1.5 V

1.5 V

3 V

0 V

50% VCC

50% VCC

Input

(see Note B)

Out-of-Phase

Output

In-Phase

Output

Timing Input

(see Note B)

50% VCC

VOLTAGE WAVEFORMS

3 V

0 V

1.5 V

1.5 V

tw

VOLTAGE WAVEFORMS

Input

LOAD CIRCUIT

From Output

Under Test

CL = 50 pF

(see Note A)

500

Ω

NOTES: A. CL includes probe and jig capacitance.

B. All input pulses are supplied by generators having the following characteristics: PRR

≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.

C. The outputs are measured one at a time with one input transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms