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LTC3520 bảng dữ liệu(PDF) 13 Page - Linear Technology

tên linh kiện LTC3520
Giải thích chi tiết về linh kiện  Synchronous 1A Buck-Boost and 600mA Buck Converters
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LTC3520 bảng dữ liệu(HTML) 13 Page - Linear Technology

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LTC3520
13
3520f
Error Amplifier
The error amplifier operates in voltage mode. Appropriate
loop compensation components must be utilized around
the amplifier (between the FB1 and VC1 pins) in order
to ensure stable operation. For improved bandwidth, an
additional RC feedforward network can be placed across
the upper feedback divider resistor.
Current Limit Operation
The buck-boost converter has two current limit circuits.
The primary current limit is an average current limit circuit
which injects an amount of current into the feedback node
which is proportional to the extent that the switch A cur-
rent exceeds the current limit value. Due to the high gain
of this loop, the injected current forces the error amplifier
output to decrease until the average current through switch
A decreases approximately to the current limit value. The
average current limit utilizes the error amplifier in an active
state and thereby provides a smooth recovery with little
overshoot once the current limit fault condition is removed.
Since the current limit is based on the average current
through switch A, the peak inductor current in current limit
will have a dependency on the duty cycle (i.e., on the input
and output voltages in the overcurrent condition).
The speed of the average current limit circuit is limited by
the dynamics of the error amplifier. On a hard output short,
it would be possible for the inductor current to increase
substantially beyond current limit before the average cur-
rent limit circuit would react. For this reason, there is a
second current limit circuit which turns off switch A if the
current ever exceeds approximately 150% of the average
current limit value. This provides additional protection in
the case of an instantaneous hard output short.
Reverse Current Limit
The reverse current comparator on switch D monitors the
inductor current entering the VOUT1 pin. If this current
exceeds 560mA (typical) switch D is turned off for the
remainder of the switching cycle.
Burst Mode Operation
With the PWM1 pin held low, the buck-boost converter
operates utilizing a variable frequency switching algorithm
designed to improve efficiency at light loads and reduce
the standby current at zero load. In Burst Mode operation,
the inductor is charged with fixed peak amplitude current
pulses. These current pulses are repeated as often as
necessary to maintain the output regulation voltage. The
typical output current which can be supplied in Burst Mode
operation is dependent upon the input and output voltage
as given by the following formula:
I
V
VV
A
OUT MAX BURST
IN
IN
OUT
(),
.•
=
+
013
In Burst Mode operation, the error amplifier is not used but
is instead placed in a low current standby mode to reduce
supply current and improve light load efficiency.
Soft-Start
The buck-boost converter incorporates a voltage mode
soft-start circuit which is adjustable via the value of an
external soft-start capacitor, CSS. The typical soft-start
duration is given by the following equation:
tSS(ms) = 0.15CSS(nF)
The converter remains in regulation during soft-start and
will therefore respond to output load transients that occur
during this time. In addition, the output voltage rise time
has minimal dependency on the size of the output capaci-
tor or load. During soft-start, the buck-boost converter is
forced into PWM operation regardless of the state of the
PWM1 pin.
Transition From Burst to PWM Operation
In Burst Mode operation, the compensation network is
not used and the VC1 pin is disconnected from the error
amplifier. During long periods of Burst Mode operation,
leakage currents in the external components or on the
PCB could cause the compensation capacitor to charge
or discharge resulting in a large output transient when
returning to the fixed frequency mode of operation. To
prevent this from happening, the LTC3520 employs an
active clamp circuit that holds the voltage on the VC1 pin
to the optimal level during Burst Mode operation. This
minimizes any output transient when returning to fixed
frequency operation.
OPERATION



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