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LTC2053 bảng dữ liệu(PDF) 4 Page - Linear Technology

tên linh kiện LTC2053
Giải thích chi tiết về linh kiện  Precision, Rail-to-Rail,Zero-Drift, Resistor-Programmable Instrumentation Amplifier
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LTC2053 bảng dữ liệu(HTML) 4 Page - Linear Technology

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LTC2053/LTC2053-SYNC
4
2053syncfb
Gain Error
AV = 1
●
0.001
0.01
%
Gain Nonlinearity
AV = 1
●
3
10
ppm
Input Offset Voltage (Note 2)
VCM = 0V
10
±20
µV
Average Input Offset Drift (Note 2)
TA = – 40°C to 85°C
●
±50
nV/°C
TA = 85°C to 125°C
●
–1
–2.5
µV/°C
Average Input Bias Current (Note 3)
VCM = 1V
●
410
nA
Average Input Offset Current (Note 3)
VCM = 1V
●
13
nA
Common Mode Rejection Ratio
AV = 1, VCM = – 5V to 5V, LTC2053C
●
105
118
dB
(Notes 4, 5)
AV = 1, VCM = – 5V to 5V, LTC2053C-SYNC
●
100
118
dB
(Notes 4, 5)
AV = 1, VCM = – 4.9V to 4.9V, LTC2053I
●
105
118
dB
AV = 1, VCM = – 4.9V to 4.9V, LTC2053I-SYNC
●
100
118
dB
AV = 1, VCM = – 5V to 5V, LTC2053I, LTC2053I-SYNC
●
95
118
dB
AV = 1, VCM = –4.9V to 4.9V, LTC2053H
●
100
dB
AV = 1, VCM = –5V to 5V, LTC2053H
●
90
dB
Power Supply Rejection Ratio (Note 6)
VS = 2.7V to 11V
●
110
116
dB
Maximum Output Voltage Swing
RL = 2k to GND, C and I Grades
●
±4.5
±4.8
V
RL = 10k to GND, All Grades
●
±4.6
±4.9
V
RL = 2k to GND, LTC2053H Only
●
±4.4
±4.8
V
Supply Current
No Load
●
0.95
1.3
mA
Supply Current, Shutdown
VEN ≥ 4.5V, LTC2053 Only
20
µA
EN Pin Input Low Voltage, VIL
– 4.5
V
CLK Pin Input Low Voltage, VIL
0.5
V
EN/CLK Pin Input High Voltage, VIH
4.5
V
EN/CLK Pin Input Current
VEN/CLK = V–
–3
– 20
µA
Internal Op Amp Gain Bandwidth
200
kHz
Slew Rate
0.2
V/µs
Internal Sampling Frequency
3kHz
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: These parameters are guaranteed by design. Thermocouple effects
preclude measurement of these voltage levels in high speed automatic test
systems. VOS is measured to a limit determined by test equipment
capability.
Note 3: If the total source resistance is less than 10k, no DC errors result
from the input bias currents or the mismatch of the input bias currents or
the mismatch of the resistances connected to –IN and +IN.
Note 4: The CMRR with a voltage gain, AV, larger than 10 is 120dB (typ).
Note 5: At temperatures above 70°C, the common mode rejection ratio
lowers when the common mode input voltage is within 100mV of the
supply rails.
Note 6: The power supply rejection ratio (PSRR) measurement accuracy
depends on the proximity of the power supply bypass capacitor to the
device under test. Because of this, the PSRR is 100% tested to relaxed
limits at final test. However, their values are guaranteed by design to meet
the data sheet limits.
The
● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = – 5V, REF = 0V.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ELECTRICAL CHARACTERISTICS



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