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LTC4355 bảng dữ liệu(PDF) 5 Page - Linear Technology

tên linh kiện LTC4355
Giải thích chi tiết về linh kiện  Positive High Voltage Ideal Diode-OR with Input Supply and Fuse Monitors
PDF  16 Pages
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Trang chủ  http://www.linear.com
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LTC4355 bảng dữ liệu(HTML) 5 Page - Linear Technology

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LTC4355

4355fa
pin FuncTions
EXPOSED PAD (Pin 15, DE Package Only): Exposed pad
may be left open or connected to GND.
FUSEFLTx (Pins 11,12/13,14): Fuse Fault Outputs.
Open-drain output that pulls to GND when VINx < 3.5V,
indicating that the fuse has blown open. Otherwise, this
output is high-impedance. Connect to GND if unused.
GATEx (Pins 2,4/2,6): Gate Drive Outputs. The GATE
pins pull high, enhancing the N-channel MOSFET when
the load current creates more than 25mV of voltage drop
across the MOSFET. When the load current is small,
the gates are actively driven to maintain 25mV across
the MOSFET. If the reverse current develops more than
–25mV of voltage drop across a MOSFET, a fast pulldown
circuit quickly connects the GATE pin to the IN pin, turning
off the MOSFET. Limit the capacitance between the GATE
and IN pins to less than 0.1µF.
GND (7/9): Device Ground.
INx(Pins1,5/1,7):InputVoltagesandGATEFastPulldown
Returns. The IN pins are the anodes of the ideal diodes
and connect to the sources of the N-channel MOSFETs.
The voltages sensed at these pins are used to control the
source-drain voltages across the MOSFETs and are used
by the fault detection circuits that drive the PWRFLT,
FUSEFLT, and VDSFLT pins. The GATE fast pulldown cur-
rent is returned through the IN pins. Connect these pins
as close to the MOSFET sources as possible. Connect to
OUT if unused.
MONx (Pins 9,14/11,16): Input Supply Monitors. These
pins are used to sense the input supply voltages. Connect
these pins to external resistive dividers between the input
suppliesandGND.IfVMONxfallsbelow1.23V,thePWRFLTx
pin pulls to GND. Connect to GND if unused.
OUT (Pin 3/4): Drain Voltage Sense and Positive Sup-
ply Input. OUT is the diode-OR output of IN1 and IN2. It
connects to the common drain connection of the N-chan-
nel MOSFETs. The voltage sensed at this pin is used to
control the source-drain voltages across the MOSFETs
and is used by the fault detection circuits that drive the
PWRFLT and VDSFLT pins. The LTC4355 is powered from
the OUT pin.
PWRFLTx (Pins 10,13/12,15): Power Fault Outputs.
Open-drain output that pulls to GND when VMONx falls
below 1.23V or the forward voltage across the MOSFET
exceeds
DVSD(FLT). When VMONx is above 1.23V and
the forward voltage across the MOSFET is less than
DVSD(FLT), PWRFLTx is high-impedance. Connect to GND
if unused.
SET (Pin 8/10):
DVSD(FLT) Threshold Configuration In-
put. Tying SET to GND, to a 100k
W resistor connected
to GND, or leaving SET open configures the
DVSD(FLT)
forward voltage fault threshold to 250mV, 500mV, or 1.5V
respectively. When the voltage across a MOSFET exceeds
DVSD(FLT), the VSDFLT pin and at least one of the PWRFLT
pins pull to GND.
VDSFLT (Pin 6, DE Package Only): MOSFET Fault Output.
Open-drainoutputthatpullstoGNDwhentheforwardvolt-
age across either MOSFET exceeds
DVSD(FLT). PWRFLT1
or PWRFLT2 also pulls low to indicate which MOSFET’s
forward voltage drop exceeds
DVSD(FLT). Otherwise, this
pin is high-impedance. Connect to GND if unused.
(DE/S Packages)



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