LTC4303

3

4303fb

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All currents into pins are positive; all voltages are referenced to

GND unless otherwise specified.

Note 3: Pulsed less than 5µs.

Note 4: The connection circuitry always regulates the output to a higher

voltage than its input. The magnitude of this offset voltage as a function of

Characteristics section.

the Typical Performance Characteristics section.

Note 6: Guaranteed by design, not tested in production.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

SDA, SCL, Logic Input Threshold Voltage (Note 6)

50

mV

Hysteresis

Delay ENABLE High-Low to Disconnect

300

ns

Delay READY High-Low after Disconnect

10

ns

Delay ENABLE Low-High to Connect

●

60

95

175

µs

Delay READY Low-High after Connect

10

ns

Ready Off Leakage Current

●

±10

µA

Rise-Time Accelerators

Transient Boosted Pull-Up Current

2

3.5

5.5

mA

Slew Rate = 0.8V/µs (Note 5)

Bus Stuck Low Timeout

Bus Stuck Low Timer

SDAOUT, SCLOUT = 0V

●

25

30

35

ms

Input-Output Connection

Input-Output Offset Voltage

●

40

80

120

mV

●

50

100

150

mV

Digital Input Capacitance

(Note 6)

10

pF

SDAIN, SDAOUT, SCLIN, SCLOUT

Input Logic Low Voltage

●

0.4

V

Input Leakage Current

●

±5

µA

Output Low Voltage, Input = 0

●

0

0.19

0.3

V

Timing Characteristics

(Note 6)

400

600

kHz

Bus Free Time Between Stop and Start

(Note 6)

1.3

µs

Condition

Hold Time After (Repeated)

(Note 6)

100

ns

Start Condition

Repeated Start Condition Set-Up Time

(Note 6)

0

ns

Stop Condition Set-Up Time

(Note 6)

0

ns

Data Hold Time Input

(Note 6)

0

ns

Data Set-Up Time

(Note 6)

100

ns