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LTC1741CFW bảng dữ liệu(PDF) 13 Page - Linear Technology |
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LTC1741CFW bảng dữ liệu(HTML) 13 Page - Linear Technology |
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13 / 20 page ![]() 13 LTC1741 1741f Reference Operation Figure 5 shows the LTC1741 reference circuitry consisting of a 2.35V bandgap reference, a difference amplifier and switching and control circuit. The internal voltage refer- ence can be configured for two pin selectable input ranges of 2V( ±1V differential) or 3.2V(±1.6V differential). Tying the SENSE pin to ground selects the 2V range; tying the SENSE pin to VDD selects the 3.2V range. The 2.35V bandgap reference serves two functions: its output provides a DC bias point for setting the common mode voltage of any external input circuitry; additionally, the reference is used with a difference amplifier to gener- ate the differential reference levels needed by the internal ADC circuitry. An external bypass capacitor is required for the 2.35V reference output, VCM. This provides a high frequency low impedance path to ground for internal and external cir- cuitry. This is also the compensation capacitor for the reference. It will not be stable without this capacitor. The difference amplifier generates the high and low refer- ence for the ADC. High speed switching circuits are connected to these outputs and they must be externally bypassed. Each output has two pins: REFHA and REFHB for the high reference and REFLA and REFLB for the low reference. The doubled output pins are needed to reduce package inductance. Bypass capacitors must be con- nected as shown in Figure 5. Other voltage ranges in between the pin selectable ranges can be programmed with two external resistors as shown in Figure 6a. An external reference can be used by applying its output directly or through a resistor divider to SENSE. It is not recommended to drive the SENSE pin with a logic device since the logic threshold is close to ground and VDD. The SENSE pin should be tied high or low as close to the converter as possible. If the SENSE pin is driven externally, it should be bypassed to ground as close to the device as possible with a 1 µF ceramic capacitor. Input Range The input range can be set based on the application. For oversampled signal processing in which the input fre- quency is low (<10MHz), the largest input range will provide the best signal-to-noise performance while main- taining excellent SFDR. For high input frequencies (> 40MHz), the 2V range will have the best SFDR perfor- mance for the 2nd and 3rd harmonics, but the SNR will degrade by 1.5dB. See the Typical Performance Charac- teristics section. APPLICATIO S I FOR ATIO 25 Ω 5V SINGLE-ENDED INPUT 2.35V ±1/2 RANGE VCM AIN + AIN – 12pF 12pF 12pF 1741 F04 4.7 µF 25 Ω 100 Ω 500 Ω 500 Ω 25 Ω 25 Ω LTC1741 – + 1/2 LT1810 – + 1/2 LT1810 Figure 4. Differential Drive with Op Amps VCM REFHA REFLB SENSE TIE TO VDD FOR 3.2V RANGE; TIE TO GND FOR 2V RANGE; RANGE = 2 • VSENSE FOR 1V < VSENSE < 1.6V 2.35V REFLA REFHB 4.7 µF 4.7 µF INTERNAL ADC HIGH REFERENCE BUFFER 0.1 µF 1741 F05 LTC1741 4 Ω DIFF AMP 1 µF 1 µF 0.1 µF INTERNAL ADC LOW REFERENCE 2.35V BANDGAP REFERENCE 1.6V 1V RANGE DETECT AND CONTROL Figure 5. Equivalent Reference Circuit |
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