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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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APA600-FGES bảng dữ liệu(PDF) 29 Page - Actel Corporation |
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APA600-FGES bảng dữ liệu(HTML) 29 Page - Actel Corporation |
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29 / 174 page  ProASICPLUS Flash Family FPGAs v5.7 1-23 Table 1-12 • Basic Memory Configurations Type Write Access Read Access Parity Library Cell Name RAM Asynchronous Asynchronous Checked RAM256x9AA RAM Asynchronous Asynchronous Generated RAM256x9AAP RAM Asynchronous Synchronous Transparent Checked RAM256x9AST RAM Asynchronous Synchronous Transparent Generated RAM256x9ASTP RAM Asynchronous Synchronous Pipelined Checked RAM256x9ASR RAM Asynchronous Synchronous Pipelined Generated RAM256x9ASRP RAM Synchronous Asynchronous Checked RAM256x9SA RAM Synchronous Asynchronous Generated RAM256xSAP RAM Synchronous Synchronous Transparent Checked RAM256x9SST RAM Synchronous Synchronous Transparent Generated RAM256x9SSTP RAM Synchronous Synchronous Pipelined Checked RAM256x9SSR RAM Synchronous Synchronous Pipelined Generated RAM256x9SSRP FIFO Asynchronous Asynchronous Checked FIFO256x9AA FIFO Asynchronous Asynchronous Generated FIFO256x9AAP FIFO Asynchronous Synchronous Transparent Checked FIFO256x9AST FIFO Asynchronous Synchronous Transparent Generated FIFO256x9ASTP FIFO Asynchronous Synchronous Pipelined Checked FIFO256x9ASR FIFO Asynchronous Synchronous Pipelined Generated FIFO256x9ASRP FIFO Synchronous Asynchronous Checked FIFO256x9SA FIFO Synchronous Asynchronous Generated FIFO256x9SAP FIFO Synchronous Synchronous Transparent Checked FIFO256x9SST FIFO Synchronous Synchronous Transparent Generated FIFO256x9SSTP FIFO Synchronous Synchronous Pipelined Checked FIFO256x9SSR FIFO Synchronous Synchronous Pipelined Generated FIFO256x9SSRP |
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