AX2000-1CSG896 datasheet(17/226 Pages) ACTEL

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Axcelerator Family FPGAs

v2.7

2-3

LVCMOS - 15 (JESD8-11)

1.5

78.8

44.9

123.6

PCI

3.3

108.9

213.5

322.4

PCI-X

3.3

108.9

158.0

266.9

Single-Ended with VREF

HSTL-I

1.5

36.8

SSTL2-I

2.5

166.9

SSTL2-II

2.5

143.5

SSTL3-I

3.3

322.8

SSTL3-II

3.3

284.0

GTLP - 25

2.5

TBD

GTLP - 33

3.3

TBD

Differential

LVPECL - 33

N/A

3.3

255.1

LVDS - 25

N/A

2.5

140.4

Table 2-5 •

Different Components Contributing to the Total Power Consumption in Axcelerator Devices

Component

Definition

Device Specific Value (in µW/MHz)

AX125 AX250 AX500 AX1000

AX2000

Core tile HCLK power component

130

216

R-cell power component

0.2

HCLK signal power dissipation

4.5

13.5

Core tile RCLK power component

130

216

R-cell power component

0.3

RCLK signal power dissipation

6.5

19.5

Power dissipation due to the switching activity on the R-cell

1.6

Power dissipation due to the switching activity on the C-cell

1.4

Power component associated with the input voltage

P10

Power component associated with the output voltage

See table Per pin contribution

P11

Power component associated with the read operation in the RAM

block

P12

Power component associated with the write operation in the RAM

block

P13

Core PLL power component

1.5

Table 2-4 •

Default CLOAD/VCCI (Continued)

CLOAD (pF)

VCCI (V)

PLOAD (μw/MHz)

P10 (μw/MHz)

PI/O (μW/MHz)*

Note: *PI/O = P10 + CLOAD *VCCI

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