STFLWARP20 datasheet(9/28 Pages) STMICROELECTRONICS

tên linh kiện	STFLWARP20

Giải thích chi tiết về linh kiện	8-BIT FUZZY CO-PROCESSOR

PDF	28 Pages

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Output Port. This block provides the output data

supported by handshaking signals. Ouput data

resolution is 8 bit.

An output ready on the bus O0-O7 is indicated by

a DS pulse and by its identification number (OC0-

OC1). WAIT active temporarily stops the elabora-

tion phase allowing the synchronization with slower

devices.

Programmable A/D output pulse. This block al-

lows to program the width of the pulse provided on

O11 (only in On-Line mode) that can be used as a

Start Conversion for an external A/D. The width of

this pulse can be configured by means of the

related register (see register bench description)

following the table 4.

Start conversion

Pulse Register

Pulse Width

(TCLK = MCLK Period)

Low, Low, Low

128xTCLK

Low, Low, High

256xTCLK

Low, High, Low

2040xTCLK

Low, High, High

4080xTCLK

High, Low, Low

8160xTCLK

High, Low, High

16320xTCLK

High, High, Low

32000xTCLK

High, High, High

65520xTCLK

Table 4. Start Conversion Pulse (O11) Width

Setting.

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W.A.R.P.2.0

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