MF201 datasheet(6/26 Pages) TI

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RECEIVER SWITCHING CHARACTERISTICS

SN65MLVD201, SN65MLVD203

SN65MLVD206, SN65MLVD207

SLLS558C – DECEMBER 2002 – REVISED JANUARY 2007

over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP(1)

MAX

UNIT

tpLH

Propagation delay time, low-to-high-level output

tpHL

Propagation delay time, high-to-low-level output

Output signal rise time

2.3

Output signal fall time

CL = 15 pF, See Figure 10

2.3

Type 1

100

300

tsk(p)

Pulse skew (|tpHL – tpLH|)

Type 2

300

500

tsk(pp)

Part-to-part skew(2)

tjit(per)

Period jitter, rms (1 standard deviation) (3)

100 MHz clock input(4)

Type 1

300

700

tjit(pp)

Peak-to-peak jitter(3)(5)

200 Mbps 215–1 PRBS input(6)

Type 2

450

800

tpHZ

Disable time, high-level-to-high-impedance output

tpLZ

Disable time, low-level-to-high-impedance output

See Figure 11

tpZH

Enable time, high-impedance-to-high-level output

tpZL

Enable time, high-impedance-to-low-level output

(1)

All typical values are at 25

°C and with a 3.3-V supply voltage.

(2)

tsk(pp) is the magnitude of the time difference in propagation delay times between any specified terminals of two devices when both

devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.

(3)

Jitter is ensured by design and characterization. Stimulus jitter has been subtracted from the numbers.

(4)

VID = 200 mVpp (LVD201, 203), VID = 400 mVpp (LVD206, 207), Vcm = 1 V, tr = tf = 0.5 ns (10% to 90%), measured over 30 k samples.

(5)

Peak-to-peak jitter includes jitter due to pulse skew (tsk(p)).

(6)

VID = 200 mVpp (LVD201, 203), VID = 400 mVpp (LVD206, 207), Vcm = 1 V, tr = tf = 0.5 ns (10% to 90%), measured over 100 k samples.

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Product Folder Link(s): SN65MLVD201 SN65MLVD203 SN65MLVD206 SN65MLVD207

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