FMP3217BA2 datasheet(7/12 Pages) FIDELIX

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FMP3217BAx

CMOS LPRAM

Revision 0.3

Feb. 2007

READ CYCLE (2) (/ZZ=/WE=VIH)

1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced

to output voltage levels.

2. At any given temperature and voltage condition, tHZ(Max.) is less than tLZ(Min.) both for a given device and from device

to device interconnection.

3. Do not access device with cycle timing shorter than tRC(tWC) for continuous periods > 20us.

Address

tAA

tCO

tBA

tOE

tOH

tOLZ

tBLZ

tLZ

Data Valid

High-Z

tHZ

tBHZ

tOHZ

/CS

/UB, /LB

/OE

Data Out

tRC

READ CYCLE (1) (Address controlled,/CS=/OE=VIL, /ZZ=/WE=VIH, /UB or/and /LB=VIL)

Address

Data Out

tRC

Previous Data Valid

Data Valid

tAA

tOH

1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced

to output voltage levels.

2. At any given temperature and voltage condition, tHZ(Max.) is less than tLZ(Min.) both for a given device and from device

to device interconnection.

3. Do not access device with cycle timing shorter than tRC(tWC) for continuous periods > 20us.

4. In case page address skew is over 3ns, tPAA will be out of spec.

PAGE READ CYCLE (/ZZ=/WE=VIH, 16 words access)

A0~A3

tAA

tCO

tBA

tOE

High-Z

tHZ

tBHZ

tOHZ

/CS

/UB, /LB

/OE

Data Out

tRC

A4~A20

tOH

tPC

tPAA

tLZ

tBLZ

tOLZ

Data Valid

tMRC

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