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CMS3216LAH bảng dữ liệu(PDF) 25 Page - FIDELIX

tên linh kiện CMS3216LAH
Giải thích chi tiết về linh kiện  32M(2Mx16) Low Power SDRAM
PDF  46 Pages
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CMS3216LAH bảng dữ liệu(HTML) 25 Page - FIDELIX

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Rev0.2, Jan. 2007
CMS3216LAx-75xx
A fixed-length READ burst or a full-page burst may be fol-
lowed by, or truncated with, a PRECHARGE command to the
same bank . The PRECHARGE command should be issued
x cycles before the clock edge at which the last desired data
element is valid, where x equals the CAS latency minus one.
This is shown in Figure 9. for each possible CAS latency; data
element n + 3 is either the last of a burst of four or the last
desired of a longer burst. Following the PRECHARGE comman-
d, a subsequent command to the same bank cannot be issued
until tRP is met. Note that part of the row precharge time is
hidden during the access of the last data element(s). The
BURST TERMINATE command should be issued x cycles
before the clock edge at which the last desired data element is
valid, where x equals the CAS latency minus one. This is
shown in Figure 10. for each possible CAS latency; data
element n + 3 is the last desired data element of a longer burst.
Figure 9. Read to Precharge
T0
T1
T2
CAS Latency=1
T3
T4
T5
Dout
n
Dout
n+1
Dout
n+2
Dout
n+3
Read
NOP
NOP
NOP
Precharge
NOP
Bank a
Col n
Bank
(a or all)
X=0cycles
T6
NOP
T7
Active
Bank a
Row
tRP
T0
T1
T2
CAS Latency=2
T3
T4
T5
Dout
n
Dout
n+1
Dout
n+2
Dout
n+3
Read
NOP
NOP
NOP
Precharge
NOP
Bank a
Col n
Bank
(a or all)
X=1cycles
T6
NOP
T7
Active
Bank a
Row
tRP
CLK
Command
Address
DQ
CLK
Command
Address
DQ



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