LPC2921 datasheet(47/81 Pages) PHILIPS

47 / 81 page

LPC2921_2923_2925_0

Preliminary data sheet

Rev. 00.01 — 24 October 2008

47 of 81

NXP Semiconductors

LPC2921/2923/2925

ARM9 microcontroller with CAN and LIN

6.15.3.1

Pin description

The CGU1 module in the LPC2921/2923/2925 has the pins listed in Table 25 below.

6.15.4 Reset Generation Unit (RGU)

The RGU controls all internal resets.

The key features of the Reset Generation Unit (RGU) are:

• Reset controlled individually per subsystem

• Automatic reset stretching and release

• Monitor function to trace resets back to source

• Register write-protection mechanism to prevent unintentional resets

6.15.4.1

Functional description

Each reset output is defined as a combination of reset input sources including the external

reset input pins and internal power-on reset, see Table 27. The first five resets listed in

this table form a sort of cascade to provide the multiple levels of impact that a reset may

have. The combined input sources are logically OR-ed together so that activating any of

the listed reset sources causes the output to go active.

Fig 12. Block diagram of the CGU1

PLL

FDIV0

OUT 0

OUT 2

002aae250

clkout

clkout120

clkout240

CLOCK GENERATION UNIT

(CGU1)

AHB TO DTL BRIDGE

BASE_USB_CLK

BASE_OUT_CLK

BASE_ICLK1_CLK

BASE_ICLK0_CLK

Table 26.

CGU1 pins

Symbol

Direction

Description

CLK_OUT

OUT

clock output

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