AT89C51CC02CA-RATUM datasheet(70/159 Pages) ATMEL

tên linh kiện	AT89C51CC02CA-RATUM

Giải thích chi tiết về linh kiện	Enhanced 8-bit Microcontroller with CAN Controller and Flash

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AT/T89C51CC02

4126L–CAN–01/08

Watchdog Programming

The three lower bits (S0, S1, S2) located into WDTPRG register permit to program the

WDT duration.

Table 50. Machine Cycle Count

To compute WD Timeout, the following formula is applied:

Note:

Svalue represents the decimal value of (S2 S1 S0)

Find Hereafter computed Timeout values for f

OSCXTAL = 12 MHz in X1 mode

Table 51. Timeout Computation

Machine Cycle Count

14 - 1

15 - 1

216 - 1

17 - 1

18 - 1

219 - 1

220 - 1

21 - 1

fOSC=12 MHz

fOSC=16MHz

fOSC=20 MHz

16.38 ms

12.28 ms

9.82 ms

32.77 ms

24.57 ms

19.66 ms

65.54 ms

49.14 ms

39.32 ms

131.07 ms

98.28 ms

78.64 ms

262.14 ms

196.56 ms

157.28 ms

524.29 ms

393.12 ms

314.56 ms

1.05 s

786.24 ms

629.12 ms

2.10 s

1.57 s

1.25 s

FTime

Out

osc

WD X2

∧

Svalue

()

-----------------------------------------------------------------------------

–

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