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USB6B1 bảng dữ liệu(PDF) 3 Page - STMicroelectronics

tên linh kiện USB6B1
Giải thích chi tiết về linh kiện  DATA LINES PROTECTION
PDF  9 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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USB6B1 bảng dữ liệu(HTML) 3 Page - STMicroelectronics

  USB6B1 Datasheet HTML 1Page - STMicroelectronics USB6B1 Datasheet HTML 2Page - STMicroelectronics USB6B1 Datasheet HTML 3Page - STMicroelectronics USB6B1 Datasheet HTML 4Page - STMicroelectronics USB6B1 Datasheet HTML 5Page - STMicroelectronics USB6B1 Datasheet HTML 6Page - STMicroelectronics USB6B1 Datasheet HTML 7Page - STMicroelectronics USB6B1 Datasheet HTML 8Page - STMicroelectronics USB6B1 Datasheet HTML 9Page - STMicroelectronics  
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USB6Bx
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While the USB6Bx provides a high immunity to
ESD surge, an efficient protection depends on the
layout of the board. In the same way, with the rail to
rail topology, the track from the VCC pin to the
power supply and from the GND pin to GND volt-
age must be as short as possible to avoid
overvoltages due to parasitic phenomena (see Fig
A1).
It’s often harder to connect the power supply near
to the USB6Bx unlike the ground thanks to the
ground plane that allows a short connection.
To ensure the same efficiency for positive surges
when the connections can’t be short enough, we
recommend to put close to the USB6Bx between
VCC and ground, a capacitance of 100nF to pre-
vent from these kinds of overvoltage disturbances
(see Fig. A2 ).
The add of this capacitance will allow a better pro-
tection by providing during surge a constant volt-
age.
Fig. A3 shows the improvement of the ESD pro-
tection according to the recommendations de-
scribed above.
HOW TO ENSURE A GOOD ESD PROTECTION
Fig. A2: ESD behavior: optimized layout and add
of a capacitance of 100nF.
REF1=GND
VI/O
ESD
SURGE
I/O
REF2=+Vcc
C=100nF
Lw
Vcl+ = Vcc+Vf
-Vf
surge >0
surge <0
Vcl- =
t
Vcl+
POSITIVE
SURGE
t
Vcl-
NEGATIVE
SURGE
IMPORTANT:
A main precaution to take is to put the protection
device closer to the disturbance source (generally
the connection).



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