AT85C5122D-RDRUM datasheet(80/208 Pages) ATMEL

80 / 208 page

AT83R5122, AT8xC5122/23

4202F–SCR–07/2008

Reset Value = 0X00 0000b

Note:

1) In case of multiple interrupts occuring at the same time (sampled by the same edge of

the internal clock), the interrupts will be serviced in the following order from the highest to

the lowest priority :

- UART Transmit Buffer Empty

- Card Current Overflow

- Card Voltage Error

- Waiting Time Counter Timeout

- UART Transmitted Character

- UART Received Character

- Character Reception Parity Error

2) It is recommended that the application saves the SCIIR register after reading it in

order to avoid the loss of pending interruptions as the SCIIR register is cleared when it is

read by the MCU.

Table 47.

Smart Card UART Interrupt Identification Register (Read Only)

SCIIR (S:AEh, SCRS=0)

SCTBI

ICARDERR

VCARDERR

SCWTI

SCTI

SCRI

SCPI

Bit Number

Bit Mnemonic

Description

7SCTBI

UART Transmit Buffer Empty Interrupt

This bit is set by hardware when the Transmit Buffer is copied into the transmit shift register of the Smart

Card UART. It generates an interrupt if ESCTBI bit is set in SCIER register otherwise this bit is irrelevant.

It is cleared by hardware when this register is read.

Reserved

The value read from this bit is indeterminate. Do not change this bit.

ICARDERR

Card Current Overflow Interrupt

This bit is set when the current on card is above the limit specified by bit OVFADJ in DCCKPS register (Table

61 on page 92). It generates an interrupt if ICARDER bit is set in SCIER register otherwise this bit is

irrelevant.

It is cleared by hardware when this register is read.

VCARDERR

Card Voltage Error Interrupt

This bit is set when the output voltage goes out of the voltage range specified by VCARD field. It generates

an interrupt if EVCARDER bit is set in SCIER register otherwise this bit is irrelevant.

It is cleared by hardware when this register is read.

3SCWTI

Waiting Time Counter Timeout Interrupt

This bit is set by hardware when the Waiting Time Counter has expired. It generates an interrupt if ESCWTI

bit is set in SCIER register otherwise this bit is irrelevant.

It is cleared by hardware when this register is read.

2SCTI

UART Transmitted Character Interrupt

This bit is set by hardware when the Smart Card UART has completed the character transmission. It

generates an interrupt if ESCTI bit is set in SCIER register otherwise this bit is irrelevant.

It is cleared by hardware when this register is read.

SCRI

UART Received Character Interrupt

This bit is set by hardware when the Smart Card UART has completed the character reception. It generates

an interrupt if ESCRI bit is set in SCIER register otherwise this bit is irrelevant.

It is cleared by hardware when this register is read.

0SCPI

Character Reception Parity Error Interrupt

This bit is set at the same time as SCTI or SCRI if a parity error is detected on the received character. It

generates an interrupt if ESCPI bit is set in SCIER register otherwise this bit is irrelevant.

It is cleared by hardware when this register is read.

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