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CS42438-DMZ bảng dữ liệu(PDF) 52 Page - Cirrus Logic |
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CS42438-DMZ bảng dữ liệu(HTML) 52 Page - Cirrus Logic |
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52 / 61 page ![]() 52 DS646F2 CS42438 8.1.2 Passive Input Filter w/Attenuation Some applications may require signal attenuation prior to the ADC. The full-scale input voltage will scale with the analog power supply voltage. For VA = 5.0 V, the full-scale input voltage is approximately 2.8 Vpp, or 1 Vrms (most consumer audio line-level outputs range from 1.5 to 2 Vrms). Figure 23 shows a passive input filter with 6 dB of signal attenuation. Due to the relatively high input im- pedance on the analog inputs, the full distortion performance cannot be realized. Also, the resistor divider circuit will determine the input impedance into the input filter. In the circuit shown in Figure 23, the input impedance is approximately 5 k Ω. By doubling the resistor values, the input impedance will increase to 10 k Ω. However, in this case the distortion performance will drop due to the increase in series resistance on the analog inputs. 2700 pF C0G 10 μF 2.5 k Ω AIN1+,2+,3+,4+ AIN1-,2-,3-,4- ADC1-2 4.7 μF 2700 pF C0G 10 μF 2.5 k Ω AIN5A,6A AIN5B,6B ADC3 2700 pF C0G 10 μF 2.5 k Ω Ω 2.5 k Ω 2.5 k Ω 2.5 k Figure 23. Passive Input Filter w/Attenuation |
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