28

DS626F3

CS5366

4.10

Analog Connections

The analog modulator samples the input at half of the internal Master Clock frequency, or 6.144 MHz nom-

inally. The digital filter will reject signals within the stopband of the filter. However, there is no rejection of

input signals that are at (N X 6.144 MHz) the digital passband frequency, where n=0,1,2.... Refer to

Figure 15, which shows the suggested filter that will attenuate any noise energy at 6.144 MHz in addition to

providing the optimum source impedance for the modulators. The use of capacitors that have a large volt-

age coefficient (such as general-purpose ceramics) must be avoided since these can degrade signal linear-

ity. COG capacitors are recommended for this application. For additional configurations, refer to Cirrus

Application Note AN241.

Figure 15. Recommended Analog Input Buffer

VQ

+

634

Ω

634

Ω

91

Ω

91

Ω

+

-

-

2700 pF

470 pF

470 pF

COG

COG

10 uF

10 uF

ADC AIN+

ADC AIN-

AIN+

AIN-

COG

100kΩ

10 k

Ω

10 k Ω

100kΩ