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CS4525 bảng dữ liệu(PDF) 92 Page - Cirrus Logic |
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CS4525 bảng dữ liệu(HTML) 92 Page - Cirrus Logic |
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92 / 98 page ![]() 92 DS726PP3 CS4525 9.20.8 Mask for Amplifier Error (AmpErrM) Default = 0 Function: This bit serves as a mask for the amplifier error interrupt sources. If this bit is set, the AmpErr interrupt is unmasked, meaning that if the AmpErr bit is set, the INT pin will go active. If the AmpErrM bit is cleared, the AmpErr condition is masked, meaning that its occurrence will not affect the INT pin. However, the Am- pErr and the amplifier error bits in the amplifier error status register will continue to reflect the status of the amplifier error conditions. 9.21 Interrupt Status (Address 61h) - Read Only All bits in this register are considered “level-triggered” events, meaning as long as a condition continues, the corre- sponding bit will remain set. These status bits are not affected by the interrupt mask bit and the condition of each bit can be polled. These bits will not be cleared following a read to this register, nor can they be written to cause an interrupt condition. 9.21.1 SRC State Transition (SRCLockSt) Function: This bit is read only and reflects the current lock state of the SRC. When set, indicates the SRC is currently locked. When cleared, indicates the SRC is currently unlocked. 9.21.2 ADC Overflow (ADCOvflSt) Function: This bit is read only and will identify the presence of an overflow condition within the ADC. When set, in- dicates that an over-range condition is currently occurring in the CS4525 ADC signal path and has been clipped to positive or negative full scale. 9.21.3 Sub Overflow (SubOvflSt) Function: This bit is read only and will identify the presence of an overflow condition anywhere in the Sub channel’s signal path. When set, indicates that an over-range condition is currently occurring in the Sub channel’s signal path and has been clipped to positive or negative full scale. AmpErrM Setting AmpErr INT Pin Mask State 0 .......................................... AmpErr condition masked. 1 .......................................... AmpErr condition un-masked. 76 5 4 3 2 1 0 SRCLockSt ADCOvflSt SubOvflSt Ch2OvflSt Ch1OvflSt RampDone Reserved Reserved SRCLockSt Setting SRC Lock State 0 .......................................... SRC is currently unlocked. 1 .......................................... SRC is currently locked. ADCOvflSt Setting ADC Overflow State 0 .......................................... An ADC overflow condition is not currently present. 1 .......................................... An ADC overflow condition is currently present. SubOvflSt Setting Sub Overflow State 0 .......................................... An overflow condition is not currently present on the Sub channel. 1 .......................................... An overflow condition is currently present on the Sub channel. |
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