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PCA2000U/AB bảng dữ liệu(PDF) 12 Page - NXP Semiconductors

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PCA2000_2001_5
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 11 November 2008
12 of 28
NXP Semiconductors
PCA2000; PCA2001
32 kHz watch circuit with programmable adaptive motor pulse
7.9 Checking memory content
The stored data of the OTP array can be checked bit wise by measuring the supply
current. The array word is selected by the instruction state and the bit is addressed by the
shift register.
To read a word, the word is first selected (td =t1), and a logic 1 is written into the first cell
of the shift register (td =t3). This logic 1 is then shifted through the entire shift register
(td =t2), so that it points with each clock pulse to the next bit.
If the addressed OTP cell contains a logic 1, a 30 k
Ω resistor is connected between V
DD
and VSS, which increases the supply current accordingly.
Figure 8 shows the supply voltage modulation for reading word B, with the corresponding
supply current variation for word B = 110101 (sequence: first MSB and last LSB).
(1)
Fig 8.
Supply voltage modulation and corresponding supply current variation for
reading word B
VDD(nom)
VDD
VP(mod)
(1)
VSS
t0
mgw357
IDD
t1 t1
t3
t2
t1
t2
t2
t2
t2
VP(prog)(start)
tp(start)
VP(prog)(stop)
tp(stop)
∆I
DD
V
DD
30 k
---------------
=



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