TSA1203IF datasheet(14/20 Pages) STMICROELECTRONICS

14 / 20 page

TSA1203

14/20

Figure 5 : DC-coupled 2Vpp differential analog

input

Clock input

The TSA1203 performance is very dependant on

your clock input accuracy, in terms of aperture

jitter; the use of low jitter crystal controlled

oscillator is recommended.

The duty cycle must be between 45% and 55%.

The clock power supplies must be separated from

the ADC output ones to avoid digital noise

modulation at the output.

It is recommended to keep the circuit clocked, to

avoid random states, before applying the supply

voltages.

Power consumption

So as to optimize both performance and power

consumption of the TSA1203 according the

sampling frequency, a resistor is placed between

IPOL and the analog Ground pins. Therefore, the

total dissipation is adjustable from 30Msps up to

40Msps.

The TSA1203 will combine highest performances

and lowest consumption at 40Msps when Rpol is

equal to 18k

Ω. This value is nevertheless depen-

dant on application and environment.

At lower sampling frequency range, this value of

resistor may be adjusted in order to decrease the

analog

current

without

any

degradation

dynamic performances.

The table below sums up the relevant data.

Figure 6 : Total power consumption optimization

depending on Rpol value

APPLICATION

Layout precautions

To use the ADC circuits in the best manner at high

frequencies, some precautions have to be taken

for power supplies:

- First of all, the implementation of 4 separate

proper supplies and ground planes (analog,

digital, internal and external buffer ones) on the

PCB is advised for high speed circuit applications

to provide low inductance and low resistance

common return.

The separation of the analog signal from the

digital part is mandatory to prevent noise from

coupling

onto

the

input

signal.

The

best

compromise is to connect from one part AGND,

DGND, GNDBI in a common point whereas

GNDBE must be isolated. Similarly, The power

supplies AVCC, DVCC and VCCBI must be

separated from the VCCBE one.

- Power supply bypass capacitors must be placed

as close as possible to the IC pins in order to

improve high frequency bypassing and reduce

harmonic distortion.

- Proper termination of all inputs and outputs must

be incorporated with output termination resistors;

then the amplifier load will be only resistive and

the stability of the amplifier will be improved. All

leads must be wide and as short as possible

especially for the analog input in order to decrease

parasitic capacitance and inductance.

- To keep the capacitive loading as low as

possible at digital outputs, short lead lengths of

routing are essential to minimize currents when

the output changes. To minimize this output

capacitance, buffers or latches close to the output

pins will relax this constraint.

- Choose component sizes as small as possible

(SMD).

Digital Interface application

Thanks to its wide external buffer power supply

range, the TSA1203 is perfectly suitable to plug in

to 2.5V low voltage DSPs or digital interfaces as

well as to 3.3V ones.

Medical Imaging application

Driven by the demand of the applications requiring

nowadays either portability or high degree of par-

allelism (or both), this product has been devel-

oped to satisfy medical imaging, and telecom in-

frastructures needs.

As a typical system diagram shows figure 7, a nar-

row input beam of acoustic energy is sent into a

living body via the transducer and the energy re-

flected back is analyzed.

Fs (Msps)

Rpol (

Ω)

Optimized

power (mW)

145

180

230

TSA1203

VIN

VINB

INCM

330pF

4.7uF

10nF

analog

AC+DC

VREFP

VREFM

VREFP-VREFM = 1 V

analog

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