công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

ADV3002 bảng dữ liệu(PDF) 13 Page - Analog Devices

tên linh kiện ADV3002
Giải thích chi tiết về linh kiện  4:1 HDMI/DVI Switch with Equalization, DDC/CEC Buffers and EDID Replication
PDF  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
Logo AD - Analog Devices

ADV3002 bảng dữ liệu(HTML) 13 Page - Analog Devices

Back Button ADV3002 Datasheet HTML 9Page - Analog Devices ADV3002 Datasheet HTML 10Page - Analog Devices ADV3002 Datasheet HTML 11Page - Analog Devices ADV3002 Datasheet HTML 12Page - Analog Devices ADV3002 Datasheet HTML 13Page - Analog Devices ADV3002 Datasheet HTML 14Page - Analog Devices ADV3002 Datasheet HTML 15Page - Analog Devices ADV3002 Datasheet HTML 16Page - Analog Devices ADV3002 Datasheet HTML 17Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 28 page
background image
ADV3002
Rev. 0 | Page 13 of 28
HDMI/DVI receiver. If both the internal terminations are enabled
and external terminations are present, set the output current level
to 20 mA by programming the TX_OCL bit of the TMDS output
control register, as shown in Table 10 (20 mA is the default upon
reset). If only external terminations are provided (if the internal
terminations are disabled), set the output current level to 10 mA
by programming the TX_OCL bit of the TMDS output control
register. The high speed outputs must be disabled if there are no
output termination resistors present in the system.
DDC BUFFERS
The DDC buffers are 5 V tolerant bidirectional lines that carry
extended display identification data (EDID) and high bandwidth
digital content protection (HDCP) encryption. The ADV3002
provides switching and buffering for the DDC buses. The DDC
buffers are bidirectional, and fully support arbitration, clock
synchronization, and other relevant features of a standard mode
I2C bus.
EDID REPLICATION
The ADV3002 EDID replication feature reduces the total system
cost by eliminating the need for an EDID EEPROM for each HDMI
port. With the ADV3002, only a single external EDID is necessary.
The ADV3002 stores the EDID information in an on-chip SRAM.
This enables the EDID information to be simultaneously accessible
to all four HDMI ports. The ADV3002 combines the 5 V power
from the four HDMI sources such that the EDID information can
be available even when the system power is off. A block diagram
of the ADV3002 DDC buffering and EDID replication scheme is
shown in Figure 23.
HDMI
PORT A
HDMI
PORT B
HDMI
PORT C
HDMI
PORT D
2
2
2
2
2
2
2
2
2
2
2
2
SRAM
EDID
CONTROL
I2C
MASTER
EXTERNAL
EDID
EEPROM
v1.3
MCU
I2C
READ/
WRITE
SLAVE
I2C
READ/
WRITE
SLAVE
I2C
READ
SLAVE
I2C
READ
SLAVE
DDC
MUX
HDMI
Rx
I2C
READ
SLAVE
EDID_[SCL/SDA]
I2C_[SCL/SDA]
Figure 23. EDID Replication Block Diagram



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com