AD9522-1SLASHPCBZ datasheet(10/84 Pages) AD

10 / 84 page

AD9522-1

Rev. 0 | Page 10 of 84

CLOCK OUTPUT ABSOLUTE PHASE NOISE (INTERNAL VCO USED)

Table 7.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

LVDS ABSOLUTE PHASE NOISE

Internal VCO; VCO divider = 4; LVDS output and for

loop bandwidths < 1 kHz

VCO = 2650 MHz; Output = 662.5 MHz

@ 1 kHz Offset

−59

dBc/Hz

@ 10 kHz Offset

−90

dBc/Hz

@ 100 kHz Offset

−116

dBc/Hz

@ 1 MHz Offset

−134

dBc/Hz

@ 10 MHz Offset

−147

dBc/Hz

@ 40 MHz Offset

−150

dBc/Hz

VCO = 2460 MHz; Output = 615 MHz

@ 1 kHz Offset

−62

dBc/Hz

@ 10 kHz Offset

−92

dBc/Hz

@ 100 kHz Offset

−118

dBc/Hz

@ 1 MHz Offset

−136

dBc/Hz

@ 10 MHz Offset

−149

dBc/Hz

@ 40 MHz Offset

−151

dBc/Hz

VCO = 2270 MHz; Output = 567.5 MHz

@ 1 kHz Offset

−65

dBc/Hz

@ 10 kHz Offset

−95

dBc/Hz

@ 100 kHz Offset

−121

dBc/Hz

@ 1 MHz Offset

−138

dBc/Hz

@ 10 MHz Offset

−149

dBc/Hz

@ 40 MHz Offset

−151

dBc/Hz

CLOCK OUTPUT ABSOLUTE TIME JITTER (CLOCK GENERATION USING INTERNAL VCO)

Table 8.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

LVDS OUTPUT ABSOLUTE TIME JITTER

Application example based on a typical

setup where the reference source is

clean, so a wider PLL loop bandwidth is

used; reference = 15.36 MHz; R DIV = 1

VCO = 2458 MHz; LVDS = 245.76 MHz; PLL LBW = 55 kHz

158

fs rms

Integration BW = 200 kHz to 10 MHz

323

fs rms

Integration BW = 12 kHz to 20 MHz

VCO = 2458 MHz; LVDS = 122.88 MHz; PLL LBW = 55 kHz

162

fs rms

Integration BW = 200 kHz to 10 MHz

323

fs rms

Integration BW = 12 kHz to 20 MHz

VCO = 2458 MHz; LVDS = 61.44 MHz; PLL LBW = 55 kHz

210

fs rms

Integration BW = 200 kHz to 10 MHz

371

fs rms

Integration BW = 12 kHz to 20 MHz

CLOCK OUTPUT ABSOLUTE TIME JITTER (CLOCK CLEANUP USING INTERNAL VCO)

Table 9.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

LVDS OUTPUT ABSOLUTE TIME JITTER

Application example based on a typical

setup where the reference source is jittery,

so a narrower PLL loop bandwidth is used;

reference = 19.44 MHz; R DIV = 162

VCO = 2333 MHz; LVDS = 155.52 MHz; PLL LBW = 1.8 kHz

491

fs rms

Integration BW = 12 kHz to 20 MHz

VCO = 2458 MHz; LVDS = 122.88 MHz; PLL LBW = 1.8 kHz

554

fs rms

Integration BW = 12 kHz to 20 MHz

AD9522-1/PCBZ bảng dữ liệu(PDF) 10 Page - Analog Devices

AD9522-1/PCBZ bảng dữ liệu(HTML) 10 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

bảng dữ liệu tải về

Link URL