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TDA8137 bảng dữ liệu(PDF) 4 Page - STMicroelectronics |
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TDA8137 bảng dữ liệu(HTML) 4 Page - STMicroelectronics |
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4 / 5 page ![]() 4 2 1 RESET V O1 V IN1 V O2 C1 C3 DISABLE TDA8137 5 3 6 7 C1 C3 = 10 µF . . Ce C2 TYPICAL APPLICATION CIRCUIT DESCRIPTION The TDA8137 is a dual voltage regulator with Reset and Disable. The two regulation parts are supplied from one voltage reference circuit trimmed by zener zap during EWS test. Since the supply voltage of this last is connected at Pin 1 (VIN1), the regulator 2 will not work if the Pin 1 is not supplied. The outputs stages have been realized in dar- lington configuration with a drop typical of 1.2V. The disable circuit, switches off the output 2 if a voltage lower than 0.8V is applied at pin 3. The Reset circuit checks the voltage at the output 1. If this one goes below VOUT - 0.25V (4.85V Typ.), the comparator "a" (see Figure 1) discharges rap- idly the capacitor Ce and the reset output goes at once low. When the voltage at the OUT 1 rises above VOUT -0.2V (4.9V Typ.), the voltage VCe increases linearly to 2.5V corresponding to a delay td following the low : td = Ce ⋅ 2.5V 10 µA (see figure 2), then the reset output goes high again. To avoid glitches in the reset output, the second comparator "b" has a large hysteresis (1.9V). TDA8137 4/5 |
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