FSP3129SD datasheet(5/10 Pages) FOSLINK

5 / 10 page

WIDE INPUT 2A STEP-DOWN CONVERTER

2007-1-4

5/10

FSP3129

Input Capacitor

The input capacitor needs to be carefully selected to maintain sufficiently low ripple at the supply input of the

converter. A low ESR capacitor is highly recommended. Since a large current flows in and out of this capacitor during

switching, its ESR also affects efficiency.

The input capacitance needs to be higher than 10µF. The best choice is the ceramic type, however, low ESR tantalum

or electrolytic types may also be used provided that the RMS ripple current rating is higher than 50% of the output

current. The input capacitor should be placed close to the IN and G pins of the IC, with shortest possible traces. In the

case of tantalum or electrolytic types, they can be further away if a small parallel 0.1µF ceramic capacitor is placed

right next to the IC.

Output Capacitor

The output capacitor also needs to have low ESR to keep low output voltage ripple. The output ripple voltage is:

where IOUTMAX is the maximum output current, KRIPPLE is the ripple factor, RESR is the ESR resistance of the output

capacitor, fSW is the switching frequency, L is the inductor value, COUT is the output capacitance.

In the case of ceramic output capacitors, RESR is very small and does not contribute to the ripple. Therefore, a lower

capacitance value can be used for ceramic type, typically choose a capacitance of about 22µF.

In the case of tantalum or electrolytic type, the ripple is dominated by RESR multiplied by the ripple current. In that case,

the output capacitor is chosen to have sufficiently low due to ESR, typically choose a capacitor with less than 50mΩ

ESR.

Rectifier Diode

Use a Schottky diode as the rectifier to conduct current when the High-Side Power Switch is off. The Schottky diode

must have current rating higher than the maximum output current and the reverse voltage rating higher than the

maximum input voltage.

Stability Compensation

CCOMP2 is needed only for high ESR output capacitor

Figure 2: Stability compensation

The feedback system of the IC is stabilized by the components at COMP pin, as shown in Figure 2. The DC loop gain

of the system is determined by the following equation:

The dominant pole P1 is due to CCOMP

The second pole P2 is the output pole:

The first zero Z1 is due RCOMP and CCOMP

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