Line Length Tolerance

ADC Reference Setup

Video Bandwidth Control

AVID Start Pixel

TVP70025I

Subaddress

3Dh

Default (03h)

7

6

5

4

3

2

1

0

Reserved

Line length tolerance [6:0]

Line length tolerance [6:0]: Controls sensitivity to HSYNC input stability when using either the internal or external clock reference. Increased

line length tolerance settings may be required for input signals having horizontal instability. This setting may affect the precision of the clock

cycles per line counter (see subaddresses 39h–3Ah)

00h = No tolerance (minimum)

03h = 3 line length tolerance (default)

06h = 6 line length tolerance (recommended)

7Fh = 127 line length tolerance (maximum)

Subaddress

3Eh

Default (04h)

7

6

5

4

3

2

1

0

Reserved

Ref bias control [3:0]

Ref bias control [3:0]: Bias current control for ADC reference amplifier.

0h = Minimum setting

4h = Required (default)

Fh = Maximum setting

See bias current control for ADC at subaddress 2Ch.

Subaddress

3Fh

Default (00h)

7

6

5

4

3

2

1

0

Reserved

BW select [3:0]

BW select [3:0]: Selectable low-pass filter settings for controlling the analog video bandwidth. This control affects the analog video bandwidth

of all three ADC channels.

0h = Highest video bandwidth (default)

Fh = Lowest video bandwidth (~90 MHz analog video bandwidth )

NOTE: This filter setting can be used to filter high frequency noise, but the filter lacks the precision for maximum filtering of s video formats.

The lowest bandwidth setting provides a video bandwidth of at least 50 MHz.

Subaddress

40h–41h

Default (012Ch)

Subaddress

7

6

5

4

3

2

1

0

40h

AVID start [7:0]

41h

Reserved

AVID active

AVID start [12:8]

AVID active

0 = AVID out active during VBLK (default)

1 = AVID out inactive during VBLK

AVID start [12:0]: AVID start pixel number, this is an absolute pixel location from the leading edge of HSYNC (start pixel 0). The TVP70025I

updates the AVID start only when the AVID start MSB byte is written to.

AVID start pixel register also controls the position of SAV code. The TVP70025I inserts the SAV code four pixels before the pixel number

specified in the AVID start pixel register.

Copyright © 2008, Texas Instruments Incorporated

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Product Folder Link(s): TVP70025I