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M38K09RFS bảng dữ liệu(PDF) 249 Page - Renesas Technology Corp

tên linh kiện M38K09RFS
Giải thích chi tiết về linh kiện  RENESAS 8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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M38K09RFS bảng dữ liệu(HTML) 249 Page - Renesas Technology Corp

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3.1 Electrical characteristics (L.Ver)
Rev.2.00
Oct 05, 2006
page 8 of 89
38K0 Group
REJ09B0337-0200
APPENDIX
Table 3.1.7 Timing requirements (1) (VCC = 4.00 to 5.25 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Min.
Typ.
Max.
Symbol
Parameter
Limits
Unit
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tW(RESET)
tC(XIN)
tWH(XIN)
tWL(XIN)
tC(CNTR)
tWH(CNTR)
tWL(CNTR)
tWH(INT)
tWL(INT)
tC(SCLK)
tWH(SCLK)
tWL(SCLK)
tsu(RxD–SCLK)
th(SCLK–RxD)
Reset input “L” pulse width
Main clock input cycle time
Main clock input “H” pulse width
Main clock input “L” pulse width
CNTR0 input cycle time
CNTR0 input “H” pulse width
CNTR0 input “L” pulse width
INT0, INT1 input “H” pulse width
INT0, INT1 input “L” pulse width
Serial I/O clock input cycle time (Note)
Serial I/O clock input “H” pulse width (Note)
Serial I/O clock input “L” pulse width (Note)
Serial I/O input set up time
Serial I/O input hold time
2
83
35
35
200
80
80
80
80
800
370
370
220
100
Note: These limits are the rating values in the clock synchronous mode, bit 6 of address 0FE016 = “1”. In the UART mode, bit 6 of address 0FE016 = “0”; the
rating values are set to one fourth.
Min.
Typ.
Max.
Symbol
Parameter
Limits
Unit
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tW(RESET)
tC(XIN)
tWH(XIN)
tWL(XIN)
tC(CNTR)
tWH(CNTR)
tWL(CNTR)
tWH(INT)
tWL(INT)
tC(SCLK)
tWH(SCLK)
tWL(SCLK)
tsu(RxD–SCLK)
th(SCLK–RxD)
Reset input “L” pulse width
Main clock input cycle time
Main clock input “H” pulse width
Main clock input “L” pulse width
CNTR0 input cycle time
CNTR0 input “H” pulse width
CNTR0 input “L” pulse width
INT0, INT1 input “H” pulse width
INT0, INT1 input “L” pulse width
Serial I/O clock input cycle time (Note)
Serial I/O clock input “H” pulse width (Note)
Serial I/O clock input “L” pulse width (Note)
Serial I/O input set up time
Serial I/O input hold time
2
166
70
70
500
230
230
230
230
2000
950
950
400
200
Note: These limits are the rating values in the clock synchronous mode, bit 6 of address 0FE016 = “1”. In the UART mode, bit 6 of address 0FE016 = “0”; the
rating values are set to one fourth.
Table 3.1.8 Timing requirements (2) (VCC = 3.00 to 4.00 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
3.1.5 Timing requirements



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