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M30620ECFS bảng dữ liệu(PDF) 447 Page - Renesas Technology Corp

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Giải thích chi tiết về linh kiện  16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
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Address Match Interrupt
Mitsubishi microcomputers
M16C / 62 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
432
2.12.2 Operation of Address Match Interrupt
The following is an operation of address match interrupt. Figure 2.12.4 shows the set-up procedure of
address match interrupt, and Figure 2.12.5 shows the overview of the address match interrupt handling
routine.
Operation (1) The address match interrupt handling routine sets an address to be used to cause the ad-
dress match interrupt register to generate an interrupt.
(2) Setting the address match enable flag to “1” enables an interrupt to occur.
(3) An address match interrupt occurs immediately before the instruction in the address indicated
by the address match interrupt register as a program is executed.
Figure 2.12.4. Set-up procedure of address match interrupt
Can be set to “0000016” to “FFFFF16”
b7
b0
(b23)
(b16)
b7
b0
Address match interrupt register 0 [Address 001216 to 001016]
RMAD0
Address match interrupt register 1 [Address 001616 to 001416]
RMAD1
Setting address match interrupt enable register
Address match interrupt enable register [Address 000916]
AIER
Address match interrupt 0 enable bit
1: Interrupt enabled
b7
b0
Setting address match interrupt register
b7
b0
(b15)
(b8)
b4
(b20)
b3
(b19)
Address match interrupt 1 enable bit
1: Interrupt enabled



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