H83067RF datasheet(19/963 Pages) RENESAS

19 / 963 page

Rev. 4.00 Jan 26, 2006 page xix of xxii

Section 19 Clock Pulse Generator .................................................................................. 665

19.1

Overview........................................................................................................................... 665

19.1.1 Block Diagram ..................................................................................................... 666

19.2

Oscillator Circuit............................................................................................................... 667

19.2.1 Connecting a Crystal Resonator........................................................................... 667

19.2.2 External Clock Input ............................................................................................ 669

19.3

Duty Adjustment Circuit ................................................................................................... 672

19.4

Prescalers .......................................................................................................................... 672

19.5

Frequency Divider ............................................................................................................ 672

19.5.1 Register Configuration......................................................................................... 672

19.5.2 Division Control Register (DIVCR) .................................................................... 673

19.5.3 Usage Notes ......................................................................................................... 673

Section 20 Power-Down State ......................................................................................... 675

20.1

Overview........................................................................................................................... 675

20.2

Register Configuration ...................................................................................................... 677

20.2.1 System Control Register (SYSCR) ...................................................................... 677

20.2.2 Module Standby Control Register H (MSTCRH)................................................ 679

20.2.3 Module Standby Control Register L (MSTCRL)................................................. 680

20.3

Sleep Mode ....................................................................................................................... 683

20.3.1 Transition to Sleep Mode..................................................................................... 683

20.3.2 Exit from Sleep Mode.......................................................................................... 683

20.4

Software Standby Mode.................................................................................................... 684

20.4.1 Transition to Software Standby Mode ................................................................. 684

20.4.2 Exit from Software Standby Mode ...................................................................... 684

20.4.3 Selection of Waiting Time for Exit from Software Standby Mode...................... 685

20.4.4 Sample Application of Software Standby Mode.................................................. 687

20.4.5 Note...................................................................................................................... 687

20.4.6 Cautions on Clearing the Software Standby Mode of F-ZTAT Version.............. 688

20.5

Hardware Standby Mode .................................................................................................. 689

20.5.1 Transition to Hardware Standby Mode ................................................................ 689

20.5.2 Exit from Hardware Standby Mode ..................................................................... 689

20.5.3 Timing for Hardware Standby Mode ................................................................... 690

20.6

Module Standby Function ................................................................................................. 691

20.6.1 Module Standby Timing ...................................................................................... 691

20.6.2 Read/Write in Module Standby............................................................................ 691

20.6.3 Usage Notes ......................................................................................................... 691

20.7

System Clock Output Disabling Function......................................................................... 693

Section 21 Electrical Characteristics.............................................................................. 695

21.1

Electrical Characteristics of Mask ROM Version ............................................................. 695

H83067RF bảng dữ liệu(PDF) 19 Page - Renesas Technology Corp

H83067RF bảng dữ liệu(HTML) 19 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL