H8SXSLASH1663M datasheet(1488/1504 Pages) RENESAS

1488 / 1504 page

Main Revisions and Additions in this Edition

Rev. 2.00 Sep. 24, 2008 Page 1456 of 1468

REJ09B0412-0200

Item

Page

Revision (See Manual for Details)

Section 6 Exception Handling

6.6.1 Interrupt Sources

123

Replaced

Table 6.7 Interrupt Sources

Replaced due to the addition of the LVD

Section 7 Interrupt Controller

7.1 Features

130

Replaced

Figure 7.1 Block Diagram of Interrupt Controller

Replaced due to the addition of the LVD.

7.3 Register Descriptions

7.3.4 IRQ Enable Register

(IER)

137 ,

138

Replaced

Replaced due to the addition of the LVD.

7.3.5 IRQ Sense Control

Registers H and L (ISCRH,

ISCRL)

138

Replaced

Replaced due to the addition of the LVD.

7.3.6 IRQ Status Register

(ISR)

144

Replaced

Replaced due to the addition of the LVD.

7.5 Interrupt Exception

Handling Vector Table

149 to

155

Replaced

Table 7.2 Interrupt Sources, Vector Address Offsets, and

Interrupt Priority

Replaced due to the addition of the LVD.

Section 13. I/O Ports

13.3.10 Port Function Control

677,

678

Replaced

Replaced due to the addition of the LVD.

24. RAM

1103

Replaced

Replaced due to the addition of the H8SX/1668M Group.

25. Flash Memory

25.1 Features

1105

Replaced

•

ROM size

Replaced due to the addition of the H8SX/1668M Group.

Section 28. Power-Down

Modes

28.1 Features

1236

1238

Replaced

Table 28.1 States of Operation

Figure 28.1 (1) Mode Transitions

Replaced due to the addition of the LVD and power-on

reset.

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