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H8SX/1663M bảng dữ liệu(PDF) 1020 Page - Renesas Technology Corp

tên linh kiện H8SX/1663M
Giải thích chi tiết về linh kiện  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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Section 20 USB Function Module (USB)
Rev. 2.00 Sep. 24, 2008 Page 988 of 1468
REJ09B0412-0200
Bit
Bit Name
Initial
Value
R/W
Description
0
EP1DMAE
0
R/W
Endpoint 1 DMA Transfer Enable
When this bit is set, a DMAC start interrupt signal
(USBINTN0) is asserted and DMA transfer is enabled
from the endpoint 1 receive FIFO buffer to memory. If
there is at least one byte of receive data in the FIFO
buffer, the DMAC start interrupt signal (USBINTN0) is
asserted. In DMA transfer, when all the received data
is read, EP1 is automatically read and the completion
trigger operates.
EP1-related interrupt requests to the CPU are not
automatically masked.
• Operating procedure:
1. Write of 1 to the EP1 DMAE bit in DMA
2. Set the DMAC to activate through USBINTN0
3. Transfer count setting in the DMAC
4. DMAC activation
5. DMA transfer
6. DMA transfer end interrupt generated
See section 20.8.2, DMA Transfer for Endpoint 1.



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